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Description: 附件为xilinx ISE9.2的安装序列号和MAX_II_board_schematics原理图,请需要的朋友下载,
Platform: | Size: 241347 | Author: 陈磊 | Hits:

[Software Engineeringise_book

Description: Xilinx ISE9.x FPGA\\CPLD设计指南 原书光盘上的源码 包含大量vhdl源码
Platform: | Size: 8286622 | Author: yuan | Hits:

[Other resourceSparten3Epaomadeng

Description: 通过Xilinx Sparten3E Starter Kit验证程序,开发环境使用的是ISE9.1
Platform: | Size: 1272888 | Author: 孙斌 | Hits:

[Other resourcev2_fifo_vhd_258

Description: 这是一个基于xilinx ISE9.1的一个历程,包含两个FIFO代码,第一个FIFO读写用同一个时钟,第二个FIFO读写用不同的时钟。
Platform: | Size: 92406 | Author: muerqing | Hits:

[OtherISE9.1序列号

Description: XILINX FPGA开发平台
Platform: | Size: 66143 | Author: gxm323@sina.com | Hits:

[VHDL-FPGA-Verilogsn

Description: 附件为xilinx ISE9.2的安装序列号和MAX_II_board_schematics原理图,请需要的朋友下载,-Xilinx ISE9.2 annex for the installation serial number and MAX_II_board_schematics schematics, please download the Friend in need,
Platform: | Size: 240640 | Author: | Hits:

[VHDL-FPGA-VerilogSparten3Epaomadeng

Description: 通过Xilinx Sparten3E Starter Kit验证程序,开发环境使用的是ISE9.1-Xilinx Sparten3E Starter Kit through the verification process, development environment using ISE9.1
Platform: | Size: 1272832 | Author: 孙斌 | Hits:

[MPIv2_fifo_vhd_258

Description: 这是一个基于xilinx ISE9.1的一个历程,包含两个FIFO代码,第一个FIFO读写用同一个时钟,第二个FIFO读写用不同的时钟。-This is a xilinx ISE9.1 based on a course code consists of two FIFO, the first FIFO read and write using the same clock, the second FIFO read and write with a different clock.
Platform: | Size: 92160 | Author: muerqing | Hits:

[VHDL-FPGA-Veriloginternet_FPGA

Description: 介绍了Xilinx最新的EDK9.1i和ISE9.1i等工具的设计使用流程-Xilinx introduced the latest EDK9.1i and ISE9.1i the use of tools such as the design process
Platform: | Size: 143360 | Author: 伍迪 | Hits:

[VHDL-FPGA-Verilogise9.1

Description: 学习ISE的好资料,想要使用XILINX芯片进行开发必看-ISE learning good information, want to use a must-see XILINX chip development
Platform: | Size: 26989568 | Author: 李鹏 | Hits:

[Documentsise9.x

Description: Xilinx集成开发环境ISE9.X设计指南书中的例子代码-Xilinx Integrated Development Environment ISE9.X example of the code book design guide
Platform: | Size: 3507200 | Author: 张潘睿 | Hits:

[VHDL-FPGA-VerilogI2C_ise9migration

Description: IIC 的Verilog实现,工程是在Xilinx的ISE9.1上实现的-IIC of the Verilog implementation project was implemented on Xilinx' s ISE9.1
Platform: | Size: 235520 | Author: 赵文武 | Hits:

[VHDL-FPGA-VerilogXilinx_ISE_9.1_

Description: XILINX IES9.1的使用教程,精心收集,欢迎下载-XILINX IES9.1 the use of tutorials, carefully collected, please download
Platform: | Size: 1655808 | Author: 张震 | Hits:

[VHDL-FPGA-Verilogpn

Description: 基于Xilinx的ISE9.0编译的周期为63的m序列-Compiled based on Xilinx' s ISE9.0 63 m sequence of period
Platform: | Size: 382976 | Author: qs | Hits:

[VHDL-FPGA-Veriloglab_manual_tutorial

Description: 用赛灵思ISE9.2和Spartan-3E设计的四位计数器-4- Bit Counter with Xilinx ISE 9.2 and Spartan 3E
Platform: | Size: 319488 | Author: 飞飞三号 | Hits:

[VHDL-FPGA-VerilogExample-2-1

Description: XILINX ISE9.X设计指南 第二章-XILINX ISE9.X Design Guide Chapter
Platform: | Size: 515072 | Author: wanglijia | Hits:

[VHDL-FPGA-VerilogISE9.1i

Description: xilinx教程,xilinx ISE-xilinx introduction~~~~~~~~~~~~~~~~~~~~~~
Platform: | Size: 1606656 | Author: csl | Hits:

[VHDL-FPGA-VerilogISE9.1code

Description: XILINX官方几个实验的源码,内有简要说明可供参考-about xilinx demoboard development code
Platform: | Size: 47104 | Author: trainsky | Hits:

[VHDL-FPGA-Verilogfpga-for-ISE-and-Spartan

Description: 用赛灵思ISE9.2和Spartan-3E设计的四位计数器-Four counter with the Xilinx ISE9.2 and Spartan-3E
Platform: | Size: 320512 | Author: 武景 | Hits:

[VHDL-FPGA-VerilogXilinx-ISE9.x-FPGA_CPLD(source).RAR

Description: Xilinx ISE9.x FPGA_CPLD一书的例程代码-Xilinx ISE9.x FPGA_CPLD a book routines code
Platform: | Size: 8584192 | Author: 杨树 | Hits:
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