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[VHDL-FPGA-Verilog] virtex-5电路原理图

Description: virtex-5电路原理图
Platform: | Size: 508682 | Author: zmzmzmzm | Hits:

[Software Engineering] Virtex.files

Description: 在FPGA系统设计中，要达到性能最大化需要平衡具有混合性能效率的元器件，包括逻辑构造(fabric)、片上存储器、DSP和I/O带宽。在本文中，我将向你解释怎样能在追求更高系统级性能的过程中受益于Xilinx® 的Virtex™ -5 FPGA构建模块，特别是新的ExpressFabric™ 技术。以针对逻辑和算术功能的量化预期性能改进为例，我将探究ExpressFabric架构的主要功能。基于实际客户设计的基准将说明Virtex-5ExpressFabric技术性能平均比前一代Virtex-4 FPGA要高30％。-in FPGA system design to achieve maximum performance with the need to balance the efficiency of the mixed performance components including logical structure (fabric), on-chip memory, DSP and I/O bandwidth. In this article, I will explain how you can in the pursuit of higher system-level performance of the process to benefit from Xilinx
Platform: | Size: 97280 | Author: yaoming | Hits:

[Other] xapp858[1]

Description: XAPP858 - 利用 Virtex-5 FPGA 实现的高性能 DDR2 SDRAM 接口数据采集 本应用指南描述了用于实现 667 Mbps（333 MHz）高性能 DDR2 SDRAM 接口的控制器和数据采集的技巧。 本数据采集技巧使用了输入串行器/解串器（ISERDES）和输出串行器/解串器（OSERDES）的功能。-XAPP858-use Virtex-5 FPGA high-performance DDR2 SDRA M Interface Data Acquisition Guide describes the application for achieving 667 Mbps (333 MHz) high-performance DDR 2 SDRAM Interface controller and data acquisition techniques. The data collection techniques used serial input/Solution Series (ISERDES) and serial output/Solution Series (O Legacy) function.
Platform: | Size: 296960 | Author: mingming | Hits:

[VHDL-FPGA-Verilog] Virtex-5family

Description: Virtex™ -5 系列提供 FPGA 市场中最新最强大的功能。Virtex-5 系列采用第二代 ASMBL™ （高级硅片组合模块）列式架构， 包含四种截然不同的平台（子系列），比此前任何 FPGA 系列提供的选择范围都大。每种平台都包含不同的功能配比，以满 足诸多高级逻辑设计的需求。-Virtex ™ -5 family provides the latest FPGA market, the most powerful features. Virtex-5 series using second-generation ASMBL ™ (combination of advanced silicon module) out-style architecture, contains four distinct platforms (sub-series), than any previous FPGA family offers the range of options are large. Each platform contains different functional ratio, to meet the many needs of advanced logic design.
Platform: | Size: 277504 | Author: 高超 | Hits:

[Other] 226492_XILINX_VIRTEX-5

Description: xilinx FPGA virtex 5 data sheet
Platform: | Size: 463872 | Author: ly | Hits:

[VHDL-FPGA-Verilog] lcd_control

Description: The LCD control for a virtex 5 LCD. It works perfectly.
Platform: | Size: 1024 | Author: Dan | Hits:

[VHDL-FPGA-Verilog] Virtex-5DATASHEET(CHINESE)

Description: Virtex-5 中文版数据手册，找了好久才找到的。与大家分享。-Chinese version of Virtex-5 data sheet, looking for a long time to find. To share with you.
Platform: | Size: 4423680 | Author: 郭暧闵 | Hits:

[Software Engineering] MicroBlaze-and-PowerPC

Description: Virtex 5系列的硬核和软核描述 -Virtex 5 series of hard-core and soft-core description
Platform: | Size: 67584 | Author: 鱼儿水游 | Hits:

[VHDL-FPGA-Verilog] virtex_5_user_guide

Description: xilinx FPGA virtex-5系列FPGA器件手册-the user s guide for the xilinx virtex-5 fpga.
Platform: | Size: 4847616 | Author: 李伟 | Hits:

[VHDL-FPGA-Verilog] Virtex-5

Description: The Virtex® -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL™ (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains five distinct platforms (sub-families), the most choice offered by any FPGA family-The Virtex ® -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL ™ (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains five distinct platforms (sub-families), the most choice offered by any FPGA family
Platform: | Size: 22534144 | Author: zhang | Hits:

[Embeded-SCM Develop] Virtex-5EMAC

Description: This application note describes a system using the Virtex™ -5 Embedded Tri-Mode Ethernet MAC (Ethernet MAC) Wrapper core on a Xilinx Virtex-5 ML505 development board. The system provides an example of how to integrate the Virtex-5 Embedded Tri-Mode Ethernet MAC and the Virtex-5 Embedded Tri-Mode Ethernet MAC wrapper using a hardware design to target the development board, and a PC-based Graphical User Interface (GUI) to control the demonstration platform.-This application note describes a system using the Virtex ™ -5 Embedded Tri-Mode Ethernet MAC (Ethernet MAC) Wrapper core on a Xilinx Virtex-5 ML505 development board. The system provides an example of how to integrate the Virtex-5 Embedded Tri- Mode Ethernet MAC and the Virtex-5 Embedded Tri-Mode Ethernet MAC wrapper using a hardware design to target the development board, and a PC-based Graphical User Interface (GUI) to control the demonstration platform.
Platform: | Size: 492544 | Author: zhang | Hits:

[Software Engineering] ML505_Overview_Setup_2010

Description: virtex 5操作说明书，里面详细的说明了每一步操作-virtex 5 operation manual, which explains in detail every step of the operation
Platform: | Size: 10309632 | Author: 张云贺 | Hits:

[File Format] 1188896_1

Description: datasheet of virtex 5-datasheet of virtex 5
Platform: | Size: 620544 | Author: nivedita | Hits:

[VHDL-FPGA-Verilog] Virtex-5-FPGA_DDR2_SDRAM_data

Description: Virtex-5 FPGA实现的高性能 DDR2 SDRAM数据采集，需要对V5有一定基础的人学习-Virtex-5 FPGA DDR2 SDRAM to achieve high-performance data acquisition, the need for V5 have to learn some basic
Platform: | Size: 436224 | Author: apple_rao | Hits:

[Software Engineering] Virtex-5-

Description: 好用的Virtex-5 开发板与套件，基于fpga的嵌入式开发平台-Easy to use Virtex-5 development board with a package based on fpga' s embedded development platform
Platform: | Size: 81920 | Author: zhangteng | Hits:

[Software Engineering] Virtex-5

Description: Detail description about virtex 5
Platform: | Size: 158720 | Author: shifat | Hits:

[VHDL-FPGA-Verilog] Virtex-5--user-manuals-chineses

Description: xilinx virtex-5 中文用户手册 介绍了virtex5 的内部结构 功能和使用示例 完整清晰 -Chinese virtex5 user manual describes the function and use of the internal structure of an example of complete and clear
Platform: | Size: 4892672 | Author: 陈昊昌 | Hits:

[Compress-Decompress algrithms] Unfolding-Method-for-Shabal-on-Virtex-5-FPGAs

Description: Unfolding Method for Shabal on Virtex-5 FPGAs
Platform: | Size: 449536 | Author: sik | Hits:

[File Format] Virtex-5-Family-Overview

Description: Virtex-5 Family Overview
Platform: | Size: 151552 | Author: radres | Hits:

[VHDL-FPGA-Verilog] GenesysGeneral

Description: virtex-5 XC5VLX50T ucf文件.(ucf file for virtex-5 XC5VLX50T.)
Platform: | Size: 5120 | Author: sz__yz | Hits:
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