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[Other] [VHDL硬件描述语言与和数字逻辑电路设计].侯伯亭&顾新.扫描版

Description: VHDL硬件描述语言与和数字逻辑电路设计.pdf 侯伯亭&顾新.扫描版
Platform: | Size: 18692161 | Author: redmelu@hotmail.com | Hits:

[VC/MFC] 基于FPGA的数字秒表的VHDL设计

Description: 基于FPGA的数字秒表的VHDL设计
Platform: | Size: 50273 | Author: qq765218805 | Hits:

[Editor] VHDL电路设计_例子代码

Description: VHDL语言应用实例
Platform: | Size: 227390 | Author: zhp_0810@163.com | Hits:

[Button control] verilog vhdl编写的串并转换

Description: verilog vhdl编写的串并转换
Platform: | Size: 26978 | Author: Avinie_Fong | Hits:

[VHDL-FPGA-Verilog] ref-ddr-sdram-vhdl

Description: 用VHDL编写DDR SDRAM Controller的源代码- Compiles DDR SDRAM Controller with VHDL the source code
Platform: | Size: 1031168 | Author: 包盛花 | Hits:

[VHDL-FPGA-Verilog] VHDL学习手册

Description: VHDL学习手册-VHDL study manual
Platform: | Size: 5459968 | Author: 站长 | Hits:

[VHDL-FPGA-Verilog] 可综合的vhdl设计特点

Description: 可综合的vhdl设计特点.pdf-synthesizable VHDL design features. Pdf
Platform: | Size: 100352 | Author: 虞亮 | Hits:

[VHDL-FPGA-Verilog] VHDL实例

Description: 各种常用模块的VHDL描叙实例，PDF格式-various modules used VHDL depicts examples, PDF format
Platform: | Size: 168960 | Author: 付杰 | Hits:

[VHDL-FPGA-Verilog] VHDL Programing

Description: VHDL Programing
Platform: | Size: 1785856 | Author: 陈凯 | Hits:

[VHDL-FPGA-Verilog] 8051的内核(vhdl)

Description: 最完整最实用的8051的软核，用VHDL语言编写全部原代码，并有详细的注释介绍，对开发增强型多功能单片机或RSIC单片机内核和单片机SOC应用非常有参考价值-most complete most practical of the 8051 soft-core, with all the preparation VHDL source code, and the Notes for a detailed briefing on the development of an enhanced multi-purpose microcontroller core or RSIC microcontroller and microprocessor applications SOC very valuable reference
Platform: | Size: 212992 | Author: czy | Hits:

[Other] The VHDL Cookbook

Description: The VHDL Cookbook VHDL 教程 -The VHDL Cookbook VHDL Guide Directory
Platform: | Size: 238592 | Author: 黄凡 | Hits:

[Other] vhdl课件

Description: 这是我们电子电路实验课程的讲义,非常适合刚开始学习vhdl语言的读者,讲解比较清晰易懂-This is our experimental electronic circuit course lectures and are very suitable for the beginning of the study and VHDL language readers on the more lucid
Platform: | Size: 9414656 | Author: 韩飞 | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776192 | Author: 张涛 | Hits:

[VHDL-FPGA-Verilog] VHDL语言100例详解

Description: VHDL语言100例详解。详细讲解了用VHDL语言进行数字电路和数字系统设计的知识。用100个实例，不仅进行基础的门电路设计，而且还有较为复杂的数字系统设计。这些实例可以直接被调用。-VHDL Elaborates on 100 cases. Detailed account of VHDL for digital circuits and digital systems design knowledge. With 100 examples, not only for infrastructure gate design, but also more complex digital system design. These examples can be called.
Platform: | Size: 6633472 | Author: 穆群生 | Hits:

[SCM] VHDL范例

Description: 最高优先级编码器 8位相等比较器三人表决器（三种不同的描述方式）加法器描述 8位总线收发器：74245 （注2）地址译码（for m68008）多路选择器（使用select语句） LED七段译码多路选择器（使用if－else语句）双2－4译码器：74139 多路选择器（使用when－else语句）二进制到BCD码转换多路选择器（使用case语句）二进制到格雷码转换双向总线（注2）汉明纠错吗译码器三态总线（注2）汉明纠错吗编码器解复用器 -highest priority encoder, compared to eight for phase three of the vote (the description of three different ways) Adder Description eight bus Transceivers : 74,245 (Note 2) address decoder (for m68008) Multiple choice (use select statement) LED paragraph 107 of decoding multiple choice ( use if-else statements) 2-4 dual decoder : over 74,139 road choice (use when-else statements) of the binary conversion BCD multiple choice (use case statement) binary Gray code conversion to a two-way bus (Note 2)? Hamming error correction decoder three-state Bus (Note 2)? Hamming error correction encoder demultiplexer
Platform: | Size: 43008 | Author: kerty | Hits:

[VHDL-FPGA-Verilog] 国外的VHDL应用例子

Description: 国外的VHDL应用例子，大家可一好好参考一下！-abroad VHDL Application examples, we can make reference to a properly!
Platform: | Size: 232448 | Author: gjd | Hits:

[VHDL-FPGA-Verilog] vhdl程序例子

Description: vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Platform: | Size: 168960 | Author: 王力 | Hits:

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