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[Industry research] pll_verilog

Description: verilog model of a P-verilog model of a PLL
Platform: | Size: 135168 | Author: jadedfox | Hits:

[VHDL-FPGA-Verilog] pll

Description: 模拟锁相环（apll）的一些simulink模型-Analog phase-locked loop (apll) some simulink model
Platform: | Size: 734208 | Author: prescaler | Hits:

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