Description: 交通灯状态机的实现，用verilog HDL编程，Xilinx ISE 6仿真，在实际电路中得到验证．-traffic lights to achieve the state machine, with verilog HDL programming, Xilinx ISE 6 simulation, the actual circuit have been tested. Platform: |
Size: 1533527 |
Author:王越 |
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Description: 交通灯状态机的实现，用verilog HDL编程，Xilinx ISE 6仿真，在实际电路中得到验证．-traffic lights to achieve the state machine, with verilog HDL programming, Xilinx ISE 6 simulation, the actual circuit have been tested. Platform: |
Size: 1532928 |
Author:王越 |
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Description: 基于quartus 6.0的课设设计，非源码，系统设计方案-Quartus 6.0 based on the design of the class-based, non-source, system design Platform: |
Size: 675840 |
Author:陈晨 |
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Description: 已应用在北京某校园内的交通灯控制程序，可以自动控制，手动控制，可以输入设定时间等等。verilog源代码-Has been used in a Beijing campus traffic light control procedures can be automatic, manual control, you can enter the set-up time, etc.. verilog source code Platform: |
Size: 8192 |
Author:johnnyz |
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Description: 基于FPGA的交通的verilog语言设计，包括红黄绿三种灯，东西为一个方向，南北为一个方向，分别有倒计时-FPGA-based traffic verilog language design, including the red yellow and green three lights, something in one direction, a north-south direction, respectively, the countdown Platform: |
Size: 9216 |
Author:柳沐璇 |
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Description: 一个简单的交通灯的verilog语言的描述，对于新手来说较为适合学习-this is a easy VHDL code for a newer in learning VHDL,it supply with a simple code that describes traffic light Platform: |
Size: 10240 |
Author:枫林不爱晚 |
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Search - trafficLight-verilog