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[VHDL-FPGA-Veriloguartverlog

Description: 占用资源少的verilog HDL uart接口;采用固定波特率115200,可以修改程序中的分频来修改波特率,模式为1个启始位,8位数据位,1个停止位;带1字节缓存;当缓存空时输出空信号-Occupy fewer resources verilog HDL uart interface adopted a fixed baud rate of 115200, can modify the procedure to modify the baud rate frequency, the model of a start bit, 8 data bits, 1 stop bit with one word section of the cache when the cache empty space-time output signal
Platform: | Size: 2048 | Author: 张诚 | Hits:

[VHDL-FPGA-VerilogTLC549

Description: verilog TLC549AD采样程序 ,速度200K,在LED和数码管上显-verilog TLC549AD sampling procedures, the speed of 200K, in the LED and digital tube significantly
Platform: | Size: 1024 | Author: 张建中 | Hits:

[VHDL-FPGA-Verilogtlc549verilog

Description: tlc549的verilog HDL程序,希望对大家有用-tlc549 the verilog HDL program, we hope to be useful
Platform: | Size: 1024 | Author: 飞星 | Hits:

[VHDL-FPGA-VerilogTLC549

Description: 以Verilog描绘的有关于芯片TLC549的驱动程序-Described in Verilog on the driver chip TLC549
Platform: | Size: 1024 | Author: 李柏睿 | Hits:

[VHDL-FPGA-VerilogFIR2

Description: 以VERILOG语言描绘的用TLC549和TLC5615的数字低通滤波器的程序-VERILOG language used to describe the TLC549 and TLC5615 digital low pass filter process
Platform: | Size: 1024 | Author: 李柏睿 | Hits:

[VHDL-FPGA-VerilogAD[TLC549]

Description: 进阶实验之AD[TLC549] 采集模拟输入,电压动态显示在数码管,由verilog编写-Advanced experiments AD [TLC549] capture analog input voltage is dynamically displayed on the LED, written by the verilog
Platform: | Size: 200704 | Author: 林爻 | Hits:

[VHDL-FPGA-VerilogAD_1

Description: 基于FPGA的AD转换,AD芯片是TLC549,verilog-FPGA AD verilog
Platform: | Size: 1073152 | Author: 朱浩 | Hits:

[OtherAD[TLC549]

Description: AD[TLC549] :采集模拟输入,电压动态显示在数码管(用verilog实现)-AD [the TLC549]: the acquisition of the analog input voltage dynamic digital tube (Verilog)
Platform: | Size: 591872 | Author: XF | Hits:

[VHDL-FPGA-Verilogadc

Description: 用verilog实现TLC549——AD采集实验,采集完的数送给数码管显示-TLC549- AD Acquisition experimental collection finished with verilog number sent to the digital tube display
Platform: | Size: 595968 | Author: 蒋亮 | Hits:

[ARM-PowerPC-ColdFire-MIPSTLC549

Description: FPGA控制TLC549 ,verilog代码-FPGA TLC549, verilog code
Platform: | Size: 1011712 | Author: 杨 科 | Hits:

[OtherADtlc549_ctl

Description: 用Verilog HDL设计的TLC549 AD转换控制模块 -Design using Verilog HDL the TLC549 AD conversion control module
Platform: | Size: 65536 | Author: songsong | Hits:

[VHDL-FPGA-VerilogADC

Description: 使用TI公司的TLC549芯片实现模数转换,使用verilog语言进行编程,功能完整-Using TI' s TLC549 chip analog to digital conversion, using verilog programming language, full-featured
Platform: | Size: 10240 | Author: | Hits:

[VHDL-FPGA-Verilogtlc549adc

Description: 本程序是用Verilog HDL 状态机编写的tlc549的驱动程序-This procedure is used to write Verilog HDL state machine driver tlc549
Platform: | Size: 9216 | Author: zhangkui | Hits:

[VHDL-FPGA-Verilogvolt_mea_disp

Description: 本程序是用verilog 编写的模块,用来在lcd1602上显示用tlc549采样的电压值-This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value
Platform: | Size: 2275328 | Author: zhangkui | Hits:

[Other Embeded programtlc549

Description: tlc549驱动程序verilog已验证-tlc549driver,have been texted.
Platform: | Size: 1024 | Author: | Hits:

[Other Embeded programadc

Description: VERILOG编程,利用状态机实现对TLC549的采样控制,实验时可调节电位器RW1(在开发板底板左下角),改变ADC 的模拟量输入值,数据采集读取后在数码管上显示。 -Implementation of sampling control of TLC549 using state machine, adjustable potentiometer RW1 experiment (in the development board bottom left corner), change the ADC The analog input values, data acquisition and read in the digital tube display.
Platform: | Size: 1024 | Author: suzhangzhan | Hits:

[VHDL-FPGA-VerilogADC_TLC549

Description: verilog编写,利用fpga自带ADC芯片tlc549实时采集电压信号,并通过数码管显示。-verilog write, use fpga comes tlc549 ADC chip voltage signal real-time acquisition and through digital display.
Platform: | Size: 2048 | Author: | Hits:

[VHDL-FPGA-VerilogADC_TLC549

Description: 基于Verilog语言编写的TLC549驱动,驱动数码管-Based Verilog language TLC549 drive, drive digital control
Platform: | Size: 1891328 | Author: 林安 | Hits:

[Other systemstlc549adc

Description: 使用verilog编写的利用状态机实现对TLC549的采样控制,实验时可调节电位器,改变ADC 的模拟量输入值,数据采集读取后在数码管上显示。可以自己用万用表测一下输入电压, 然后与读取到的数据比较一下。-Use verilog prepared using the state machine to achieve the TLC549 sampling control, adjustable potentiometer experiment, change ADC The analog input value, after reading the data collected on the digital display. You can own what the input voltage measured with a multimeter, Then compare the read data.
Platform: | Size: 230400 | Author: wangyan | Hits:

[VHDL-FPGA-Verilogexample14-ADC-ok

Description: 基于verilog HDL开发的ADC tlc549程序控制,已经调试通过。-Based verilog HDL developed ADC tlc549 control program has been adopted debugging.
Platform: | Size: 499712 | Author: lwb | Hits:
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