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[Documents模糊控制技术及应用

Description: 计算机方面的论文-The thesis of the calculator
Platform: | Size: 30720 | Author: 李为 | Hits:

[Other Embeded programSKRETD(low_power)

Description: 硕士论文,viterbi译码器的低功耗设计,最后附带源码,VHDL-master's thesis, Viterbi Decoder low-power design, the final collateral source, VHDL
Platform: | Size: 380928 | Author: xialu | Hits:

[OtherEMCRYPTCHIPFORFPGA

Description: 基于FPGA加密芯片设计论文(AES和DES算法)-FPGA-based encryption chip design thesis (AES and DES algorithm)
Platform: | Size: 1068032 | Author: David | Hits:

[Algorithm20070112201648396

Description: FFT参考设计和一篇用VHDL实现快速傅立叶变换的论文,包括原理分析和代码实现,印度圣雄甘地大学M.A.学院提供 -FFT reference design using VHDL and realize a fast Fourier transform of the thesis, including the principles of analysis and code realize, India Mahatma Gandhi University College, MA
Platform: | Size: 93184 | Author: 吴庆庆 | Hits:

[VHDL-FPGA-Verilogelock.vhdl.pdf

Description: 一种基于VHDL的电子密码锁论文设计,有部分代码,可以下来作为参考。-A VHDL-based electronic locks thesis design, have some code that can be down as a reference.
Platform: | Size: 368640 | Author: 李里 | Hits:

[VHDL-FPGA-Verilogelock.verilog.pdf

Description: 一种基于Verilog的电子密码锁的论文介绍。有部分程序代码。-Verilog-based electronic locks thesis introduction. Some program code.
Platform: | Size: 294912 | Author: 李里 | Hits:

[VHDL-FPGA-Verilogasdd

Description: 论文基于FPGA的高速实时FFT处理器设计,给出了详细的设计流程!-Thesis of high-speed FPGA-based real-time FFT processor design, detailed design gives the flow!
Platform: | Size: 157696 | Author: 邓振淼 | Hits:

[Software EngineeringSOPC_MPEG2_trainsformer

Description: 论文题目:基于SOPC的MPEG2传输流复用器设计-Thesis topic: Based on SOPC the MPEG2 transport stream multiplexer design
Platform: | Size: 28672 | Author: 张贺 | Hits:

[ELanguagecomputercoder

Description: 计算机组成原理试验参考代码 毕业设计论文源码-Principles of Computer Organization test reference design graduate thesis source code
Platform: | Size: 2327552 | Author: 田继昌 | Hits:

[Software Engineering1041000202

Description: 一篇关于电梯的毕业设计论文 写的很规范 很详细 有一定的参考价值-An article on the design of elevator graduation thesis is written in a very detailed specification of some reference value
Platform: | Size: 841728 | Author: lc | Hits:

[Othersdramcontol

Description: SDRAM的 详细构造,工作原理,控制说明-SDRAM detailed structure, working principle, control description
Platform: | Size: 859136 | Author: li ji wei | Hits:

[VHDL-FPGA-VerilogFPGAreleaseDDS

Description: FPGA实现 DDS_讲的非常详细,师兄的一片论文-FPGA realize DDS_ talked about in great detail, of a senior thesis
Platform: | Size: 60416 | Author: ticklay | Hits:

[Software Engineeringbandpass-filter

Description: 这是一篇关于带通滤波器的毕业设计论文,涵盖IIR与FIR滤波器的设计!-This is an article on the band-pass filter design graduate thesis, covering IIR and FIR filter design!
Platform: | Size: 1155072 | Author: yuming | Hits:

[Picture ViewerJPEGactFPGA

Description: 利用FPGA实现JPEG算法的研究与实现,研究生的论文,很有参考价值-JPEG algorithm using FPGA realization of Research and Implementation of, post-graduate thesis, a good reference
Platform: | Size: 2592768 | Author: 刘小春 | Hits:

[VHDL-FPGA-Verilog745221frequency

Description: 用Verilog HDL / VHDL实现的数字频率计(完整实验报告)-Using Verilog HDL/VHDL realization of digital frequency meter (complete test report)
Platform: | Size: 145408 | Author: 倪亮 | Hits:

[DocumentsOFDM

Description: 毕业论文(单片机类)毕业设计(论文)OFDM通信系统基带数据-Thesis (Singlechip category) Graduation Project (Thesis) OFDM base-band data communication system
Platform: | Size: 1553408 | Author: 吴夏冰 | Hits:

[Industry researchVLSI_Architectures_for_ECC

Description: This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.
Platform: | Size: 1072128 | Author: MicroSam | Hits:

[Compress-Decompress algrithmsdct_latest.tar

Description: one method to DCT, it contains DCT thesis, vhdl code and example
Platform: | Size: 872448 | Author: liruoyu | Hits:

[ELanguageyima

Description: vhdl译码的部分源代码,取自硕士学位论文,希望对大家有用。-vhdl coding parts of the source code, taken from the master' s degree thesis, we hope be useful.
Platform: | Size: 3072 | Author: liuzhiyu | Hits:

[VHDL-FPGA-VerilogVHDL-electronic-clock-design

Description: 毕业论文--基于硬件描述语言VHDL的电子钟设计-Thesis- VHDL hardware description language based on the electronic clock design
Platform: | Size: 1617920 | Author: 独行侠 | Hits:
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