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[Delphi VCLtcad_source

Description: Cad component for delphi
Platform: | Size: 586752 | Author: Sarol sanyi | Hits:

[CADTCAD_pn_ids

Description: 本人主要学习研究synopsis公司的Sentaurus TCAD半导体工艺软件的使用,此程序主要是实现对光电二极管的I-V特性曲线的仿真脚本(可以测试反相击穿电压以及正向阈值电压)-I mainly study the synopsis of Sentaurus TCAD semiconductor process software, the use of this program is mainly for the photodiode I- V characteristic curve of the simulation script (can test the reverse breakdown voltage, and positive threshold voltage)
Platform: | Size: 1024 | Author: ReadingBlue | Hits:

[OtherPennState_III-V_TFET_VA_Model_1.0.1

Description: //VerilogA for double-gate GaSb-InAs Heterojunction Tunnel FET model based on lookup tables, which employs the current and capacitance characteristics calibrated TCAD Sentaurus Simulations //Model details: V. Saripalli et al IEEE/ACM NanoArch 2011. //Original Model Developed by V. Saripalli //Implemented by H. Liu -//VerilogA for double-gate GaSb-InAs Heterojunction Tunnel FET model based on lookup tables, which employs the current and capacitance characteristics calibrated TCAD Sentaurus Simulations //Model details: V. Saripalli et al IEEE/ACM NanoArch 2011. //Original Model Developed by V. Saripalli //Implemented by H. Liu
Platform: | Size: 1823744 | Author: achunn | Hits:

[OtherTFET_VerilogA_models

Description: //VerilogA for double-gate GaSb-InAs Heterojunction Tunnel FET model based on lookup tables, which employs the current and capacitance characteristics calibrated TCAD Sentaurus Simulations //Model details: V. Saripalli et al IEEE/ACM NanoArch 2011. //Original Model Developed by V. Saripalli //Implemented by H. Liu -//VerilogA for double-gate GaSb-InAs Heterojunction Tunnel FET model based on lookup tables, which employs the current and capacitance characteristics calibrated TCAD Sentaurus Simulations //Model details: V. Saripalli et al IEEE/ACM NanoArch 2011. //Original Model Developed by V. Saripalli //Implemented by H. Liu
Platform: | Size: 2163712 | Author: achunn | Hits:

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