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[Other resourceVGA_Clock

Description: 基于spartan3火龙刀系列FPGA开发板制作的VGA实验例程
Platform: | Size: 10555 | Author: 朱东亮 | Hits:

[Other resourceps2_caculator_vhdl

Description: 基于spartan3火龙刀系列FPGA开发板制作的计算器,利PS2键盘做输入控制,有很好的借鉴价值
Platform: | Size: 3139 | Author: 朱东亮 | Hits:

[Other resourceeternityclock

Description: 一个在Xilinx spartan3实现的时钟,具有时分秒的计时显示以及年月日的显示,很有参考价值
Platform: | Size: 773023 | Author: Roger | Hits:

[Embeded-SCM DevelopSP3_XILINX_PCI_sch

Description: 基于spartan3的PCI-FPGA开发板原理图详细资料。有参考价值。
Platform: | Size: 343055 | Author: 屈均伟 | Hits:

[WEB Codes3gprod_table

Description: xilinx公司的spartan3系列芯片的基本介绍。
Platform: | Size: 433922 | Author: liwei | Hits:

[VHDL-FPGA-VerilogISE8.1_loopback

Description: 硬件平台为Xilinx Spartan3e,编译软件为ISE8.1,实现了九针com口通信,键盘输入回显,switch控制LED功能。-hardware platform for Xilinx Spartan3e, compile software ISE8.1. achieved nine needles com port communication, a return to the keyboard input, LED control switch function.
Platform: | Size: 23552 | Author: Lincker | Hits:

[Otherlab4ppc

Description: 嵌入式教程:Xilinx Spartan3e 开发环境:EDK 实验教程4:Writing Basic Software Applications -Embedded Tutorial : Xilinx Spartan3e development environment : EDK experimental Guide 4 : Writing Basic Software Applications
Platform: | Size: 1597440 | Author: David | Hits:

[Other Embeded programseven_seg

Description: 一个verilog代码,该代码很适合初学者熟悉FPGA的开发流程,主要功能为实现七段代码管的显示,主要针对xilinx公司spartan3系列的FPGA-a verilog code that are very suitable for beginners FPGA familiar with the development process, main function of the realization of the code in paragraph 107, xilinx against major companies spartan3 series FPGA
Platform: | Size: 2048 | Author: 虫虫 | Hits:

[VHDL-FPGA-Verilogspeedmess

Description: 此工程项目包可以实现基于spartan3与CAN总线连接后的的汽车时速的模拟仿真。并可计算轮速差的数值。当此数值超出规定的边界值时报警。-This project can be achieved packet spartan3 based on CAN bus connection with the car after the simulation speed. And calculation of wheel speed differential values. When the value in excess of the value of the border police.
Platform: | Size: 3458048 | Author: 张宇 | Hits:

[SCMkbg

Description: 一个基于FPGA的游戏,其中包含多个项目,有吃豆子,可以连接到LCD的显示输出.该源码用xilinx的ise仿真综合成功,并且用spartan3开发板测试.可以有2个人在键盘上对弈.
Platform: | Size: 2048 | Author: 陈想 | Hits:

[VHDL-FPGA-Verilog7segInitial

Description: 基于spartan3火龙刀系列FPGA开发板制作的7段数码管设计实验例程-Fire Dragon spartan3 knife series based FPGA development board produced 7 digital tube design experimental routines
Platform: | Size: 1024 | Author: 朱东亮 | Hits:

[SCMXilinxXC3S500EFPGA

Description: 基于Xilinx XC3S500E的FPGA最小开发板制作的文章。-Xilinx XC3S500E of FPGA-based development board produced the smallest article.
Platform: | Size: 293888 | Author: aaa | Hits:

[VHDL-FPGA-Verilogeternityclock

Description: 一个在Xilinx spartan3实现的时钟,具有时分秒的计时显示以及年月日的显示,很有参考价值-A Xilinx spartan3 realize the clock, with time-accurate time display and date display, a good reference
Platform: | Size: 773120 | Author: Roger | Hits:

[Documentss3gprod_table

Description: xilinx公司的spartan3系列芯片的基本介绍。-Xilinx
Platform: | Size: 433152 | Author: liwei | Hits:

[VHDL-FPGA-VerilogPS2Fpga

Description: PS2开发源代码,取自于FPGA开发板,可直接应用于实际项目中-PS2 development of source code, derived from FPGA development board can be directly applied to actual projects
Platform: | Size: 610304 | Author: 王军 | Hits:

[VHDL-FPGA-VerilogPs2

Description: 这是一个用FPGA控制PS2接口的程序,里面用VHDL语言编写,希望大家踊跃下载!-This is a PS2 interface with FPGA control procedures, which use VHDL language, hope that we enthusiastically download!
Platform: | Size: 884736 | Author: 裴跃生 | Hits:

[VHDL-FPGA-Verilogi2c_slave

Description: i2c slave 分享給大家驗證有點issue-i2c slave to everyone to share a bit authentication issue
Platform: | Size: 362496 | Author: alex | Hits:

[VHDL-FPGA-VerilogSSC

Description: Implement the 7 segment diplay on spartan 3
Platform: | Size: 4096 | Author: spartanjoel | Hits:

[VHDL-FPGA-Verilogdds_easy

Description: 直接频率合成DDS模块的ise工程,可以直接下载,在Spartan3/Spartan3E上验证通过。该DDS模块可以产生双通道的不同频率的正弦波,也可以产生同频的任意相位差的相移波形。本模块累加器位数为32位,可以产生12位相位精度12位量化精度的正弦波。该设计例化一个Block Ram,为节省储存空间仅需要储存1/4周期的数据。根据需要,可以重新修改数据,改变波形。-DDS direct frequency synthesizer module ,ise project, can be directly downloaded through the Spartan3/Spartan3E and tested successfully. The DDS module can generate two-channel sine wave of different frequency, or produce the same frequency arbitrary waveform phase difference of the phase shift. There is a 32-bit accumulator to generate 12 bit phase-precision 12-bit quantization precision of the sine wave. Cases the design of a Block Ram, in order to save storage space need to store only 1/4 cycle of data. Necessary, can modify data, change the waveform.
Platform: | Size: 471040 | Author: 郭先生 | Hits:

[VHDL-FPGA-Verilograms

Description: several examples of accessing SRAM in Spartan3
Platform: | Size: 380928 | Author: lyle | Hits:
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