Search - signal processing vhdl

[VHDL-FPGA-Verilog] 9.16fifoasi

Description: 主要完成数字电视前端信号处理和缓冲作用的verilog源代码，可以直接使用 -the major digital TV front-end signal processing and buffer the Verilog source code can be used directly
Platform: | Size: 2761728 | Author: yjb_21cn | Hits:

[VHDL-FPGA-Verilog] 经典高速乘法器IP

Description: 乘法器是硬件设计中的很常见也很重要的一个模块，它的VHDL硬件实现很好的解决了软件编程中做乘法速度慢的问题，在实时高速系统应用中或DSP软核或数字信号处理硬件实现算法中，经常能使用到乘法器，所以经典的高速乘法器IP 很有参考价值-Multiplier is a common and important module in hardware designing.Its VHDL addresses the low speed of multiplication in software programming. Multiplier is often used in real-time high-speed system application , DSP soft core or hardware implementation of digital signal processing,so it is worthful to know classic high-speed multiplier IP
Platform: | Size: 309248 | Author: czy | Hits:

[VHDL-FPGA-Verilog] videodigitalsignalscontroller

Description: 用fpga技术实现基本的视频信号处理：主题程序；视频图象数据采集程序；sram的读写控制；测试程序-they simply use the basic technology of video signal processing : theme; Video data acquisition procedures; SRAM literacy control; test procedures
Platform: | Size: 8192 | Author: yan | Hits:

[Books] 5_2999

Description: 关于数字信号处理的文献，主要应用与fpga，用的是vhdl语言-On digital signal processing literature, the main application and fpga, using the VHDL language
Platform: | Size: 5590016 | Author: yugaoshang | Hits:

[Other] VHDL_core_for_1024-point_radix-4_FFT_computation.r

Description: 该论文阐述了用于硬件信号处理的基于4基数12点快速傅立叶变换的VHDL核的设计过程。作者：Vite-Frias Jose Alberto、Romero-Troncoso Rene de Jesus、Ordaz-Moreno -The paper described the hardware for signal processing based on the 4 base 12 points Fast Fourier Transform Nuclear VHDL design process. Authors: Vite-Frias Jose Alberto, Romero-Troncoso Rene de Jesus, Ordaz-Moreno
Platform: | Size: 440320 | Author: Rae | Hits:

[VHDL-FPGA-Verilog] FPGAbi_ioreseach

Description: :针对现场可编程门阵列(FPGA)芯片的特点,研究FPGA中双向端口I/O的设计,同时给出仿真初始化双向端口I/O的方法。采用这种双向端口的设计方法,选用Xilinx的Spartan2E芯片设计一个多通道图像信号处理系统。-: For field programmable gate array (FPGA) chip features of FPGA in the bi-directional port I/O design, the simulation is initialized at the same time two-way port I/O method. Using this design method of two-way ports, optional Spartan2E the Xilinx chip to design a multi-channel image signal processing system.
Platform: | Size: 115712 | Author: zhanyi | Hits:

[Special Effects] FPGA_YUV2RGB

Description: 自己用AHDL写的关于YUV信号转RGB信号的视频处理，硬件环境可能不太一样，可以做为参考，是在EP1C6Q240I7上运行的-AHDL write their own use on the YUV signal transduction RGB video signal processing, hardware environment may not be the same, can be used as reference, is running on EP1C6Q240I7
Platform: | Size: 15360 | Author: yhb | Hits:

[VHDL-FPGA-Verilog] fir_fpga

Description: 通过VHDL语言进行数字信号处理的FIR操作，可以很好的实现滤波功能，有很好的作用，-Through VHDL languages digital signal processing FIR operation, can good realization filtering, have good role
Platform: | Size: 2135040 | Author: fdf | Hits:

[Algorithm] FFT(VHDL)

Description: 数字信号处理fft算法计算，用fpga开发，vhdl语言写成-Digital signal processing fft algorithm using FPGA development, vhdl language
Platform: | Size: 14336 | Author: 程钢 | Hits:

[VHDL-FPGA-Verilog] FFT_VHDL

Description: fft是基本的信号处理算法，本程序为fft算法的VHDL语言-fft is a fundamental signal processing algorithms, the procedures for the fft algorithm VHDL language
Platform: | Size: 28672 | Author: 老李飞刀 | Hits:

[Communication-Mobile] VHDL

Description: 为了满足对移动通信中带外的要求 GMSK调制器的改进用数字信号处理方法实现Gmsk调制器-In order to meet the needs for in-band mobile communications requirements of GMSK modulator to improve the use of digital signal processing method Gmsk modulator
Platform: | Size: 134144 | Author: 罗竟然 | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 《数字信号处理的FPGA实现》（第二版）光盘VHDL代码-" The FPGA digital signal processing to achieve" (second edition) CD-ROM VHDL code
Platform: | Size: 251904 | Author: 王昊 | Hits:

[Software Engineering] FPGA

Description: 基于FPGA数字乘法器的设计：数字乘法嚣是目前数字信号处理中运用最广泛的执行部件之一，本文设计了三种基于FPGA 的数字乘法器．分别是移位相加乘法嚣、加法器树乘法器和移位相加一加法嚣树混合乘法器。通过对三种方案的仿真综合以厦速度和面积的比较指出了混合乘法器是其中最佳的设计方案-FPGA-based digital multiplier design: the number of multiplicative noise is the use of digital signal processing in the most extensive one of the implementation of components, the paper design of the three types of FPGA-based digital multiplier. Shift sum are noise multiplication, adder tree multiplier and the sum of a displacement hybrid adder tree multiplier noise. Through the simulation of three options to building a comprehensive comparison of the speed and size that the multiplier is one of the best hybrid design
Platform: | Size: 147456 | Author: 南才北往 | Hits:

[Other] SignalProcessing

Description: FPGA-based Implementation of Signal Processing Systems Roger Woods Queen’s University, Belfast, UK John McAllister Queen’s University, Belfast, UK Gaye Lightbody University of Ulster, UK Ying Yi University of Edinburgh, UK A
Platform: | Size: 3471360 | Author: Chandu | Hits:

[Other] VHDL

Description: 数字信号处理的FPGA实现,包括滤波器和DTF，FTT原理-FPGA realization of digital signal processing, including filters and DTF, FTT principle of
Platform: | Size: 182272 | Author: wlcwjy | Hits:

[VHDL-FPGA-Verilog] Digital-Signal-Processing-with-FPGA

Description: FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
Platform: | Size: 10501120 | Author: rickdecent | Hits:

[VHDL-FPGA-Verilog] digital-signal-processing-with--fpga

Description: 数字信号处理用FPGA实现，其中包含常见的FFT，滤波器，自相关等用VHDL和Verilog语言实现的-digital signal processing with fpga
Platform: | Size: 7065600 | Author: 张树林 | Hits:

[VHDL-FPGA-Verilog] signal-processing-vhdl-code

Description: 实时信号处理的 VHDL 代码-VHDL code for real-time signal processing
Platform: | Size: 1626112 | Author: 张磊 | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 数字信号处理的FPGA实现，VHDL源代码） -FPGA implementation of digital signal processing, VHDL source code)
Platform: | Size: 274432 | Author: 李斌 | Hits:

[VHDL-FPGA-Verilog] DIGITAL-SIGNAL-PROCESSING-WITH-FPGA

Description: 数字信号处理的FPGA实现最新版的源代码，涉及FFT变换、IIR、FIR数字滤波器等的verilog及vhdl代码-<digital signal processing with FPGA> (the latest version) . the source code involving FFT transform, IIR, FIR digital filters by verilog and vhdl.
Platform: | Size: 19156992 | Author: Rick007007 | Hits:

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[VHDL-FPGA-Verilog] 9.16fifoasi

[VHDL-FPGA-Verilog] 经典高速乘法器IP

[VHDL-FPGA-Verilog] videodigitalsignalscontroller

[Books] 5_2999

[Other] VHDL_core_for_1024-point_radix-4_FFT_computation.r

[VHDL-FPGA-Verilog] FPGAbi_ioreseach

[Special Effects] FPGA_YUV2RGB

[VHDL-FPGA-Verilog] fir_fpga

[Algorithm] FFT(VHDL)

[VHDL-FPGA-Verilog] FFT_VHDL

[Communication-Mobile] VHDL

[VHDL-FPGA-Verilog] vhdl

[Software Engineering] FPGA

[Other] SignalProcessing

[Other] VHDL

[VHDL-FPGA-Verilog] Digital-Signal-Processing-with-FPGA

[VHDL-FPGA-Verilog] digital-signal-processing-with--fpga

[VHDL-FPGA-Verilog] signal-processing-vhdl-code

[VHDL-FPGA-Verilog] vhdl

[VHDL-FPGA-Verilog] DIGITAL-SIGNAL-PROCESSING-WITH-FPGA

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