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[Documents] mii接口

Description: 以太网知识MII接口：本文主要分析MII/RMII/SMII，以及GMII/RGMII/SGMII接口的信号定义，及相关知识，同时本文也对RJ-45接口进行了总结，分析了在10/100模式下和1000M模式下的设计方法。
Platform: | Size: 412672 | Author: wucaidai | Hits:

[Embeded-SCM Develop] ml506_sgmii_design

Description: Xilinx Virtex5 SGMII高速串行通信例程。-Xilinx Virtex5 SGMII high-speed serial communication routines.
Platform: | Size: 404480 | Author: blackmew | Hits:

Description: 用verilog设计的FIR滤波器。滤波器需要很快的处理速度，所以采用了wallace树算法，超前进位加法器-The FIR filter is designed with verilog. To improve the process speed, wallace tree and fast-carrylook-aheadarithmetic were used.
Platform: | Size: 324608 | Author: simeon chan | Hits:

[DSP program] emac

Description: TI 6474 的emac 使用例程，使用88e6122 作为物理芯片，初始化sgmii与mdio,可以向上位机发送数据报文- test code for emac perpheral of dsp tms320c6474,use 88e6122 as phy device and initial sgmii and mdio ,can send ethernet packet to pc
Platform: | Size: 56320 | Author: 雷鹏勇 | Hits:

[VHDL-FPGA-Verilog] stratixIII_3sl150_dev_TSE_SGMII_v1

Description: 该程序实现altera开发板 stratix III 3S150通过以太网与pc之间通信。使用Quartus II和Nios II 设计。因为altera官方没有这块板子的正确网卡与pc通信的程序，-Overall This example works at 1000M/100M/10M Base SGMII mode on SIII 3S150 Kit. Designed by Quartus II/IP Cores/Nios II EDS v8.0 This is not an official released Design Example. It is only for your reference, but beyond the support area of ALTERA Mysupport.
Platform: | Size: 7244800 | Author: 杨庆育 | Hits:

[Embeded-SCM Develop] LogiCORE-1000BASE-X

Description: The LogiCORE™ IP Ethernet 1000BASE-X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access Controller (MAC) or other custom logic and supports two standards of operation that can be dynamically selected-The LogiCORE ™ IP Ethernet 1000BASE-X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access Controller (MAC) or other custom logic and supports two standards of operation that can be dynamically selected
Platform: | Size: 3127296 | Author: zhang | Hits:

[VHDL-FPGA-Verilog] Broadcast_filter

Description: mac_rx code which is used sgmii mac recived .
Platform: | Size: 1024 | Author: shaohejiang | Hits:

[VHDL-FPGA-Verilog] CRC_chk

Description: mac_rx code which is used sgmii mac recived .
Platform: | Size: 2048 | Author: shaohejiang | Hits:

[VHDL-FPGA-Verilog] MAC_rx_add_chk

Description: mac_rx code which is used sgmii mac recived .
Platform: | Size: 2048 | Author: shaohejiang | Hits:

[VHDL-FPGA-Verilog] MAC_rx_ctrl

Description: mac_rx code which is used sgmii mac recived .
Platform: | Size: 3072 | Author: shaohejiang | Hits:

[VHDL-FPGA-Verilog] MAC_rx_FF

Description: mac_rx code which is used sgmii mac recived .
Platform: | Size: 4096 | Author: shaohejiang | Hits:

[Other] Knowledge-of-Ethernet-interface

Description: 以太网接口知识，主要分析MII/RMII/SMII，以及GMII/RGMII/SGMII接口的信号定义及相关知识。-Knowledge of Ethernet interfaces, the main analysis of the signal definitions and knowledge of the MII/RMII/SMII, and GMII/RGMII/SGMII interfaces.
Platform: | Size: 1349632 | Author: lxk | Hits:

[VHDL-FPGA-Verilog] sgmii_latest.tar

Description: This core implements Physical Coding Sublayer of 1000BaseX transmission (IEEE 802.3 Clause36 and 37). This core can also be used for SGMII interface as this interface leverages 1000BaseX PCS. The differences between the 2 protocols are Link-timer and the control information exchanged during Auto-negotiation process.
Platform: | Size: 16048128 | Author: Archie | Hits:

[VHDL-FPGA-Verilog] sgmii_latest[1].tar

Description: 这个工程应用于千兆网传输的物理代码子层，同时也用于SGMII接口。两者不同之处是自动协商时链接定时器和控制信息。-This core implements Physical Coding Sublayer of 1000BaseX transmission (IEEE 802.3 Clause36 and 37). This core can also be used for SGMII interface as this interface leverages 1000BaseX PCS. The differences between the 2 protocols are Link-timer and the control information exchanged during Auto-negotiation process.
Platform: | Size: 16571392 | Author: hejun | Hits:

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[Documents] mii接口

[Embeded-SCM Develop] ml506_sgmii_design

[VHDL-FPGA-Verilog] FIR

[DSP program] emac

[VHDL-FPGA-Verilog] stratixIII_3sl150_dev_TSE_SGMII_v1

[Embeded-SCM Develop] LogiCORE-1000BASE-X

[VHDL-FPGA-Verilog] Broadcast_filter

[VHDL-FPGA-Verilog] CRC_chk

[VHDL-FPGA-Verilog] MAC_rx_add_chk

[VHDL-FPGA-Verilog] MAC_rx_ctrl

[VHDL-FPGA-Verilog] MAC_rx_FF

[Other] Knowledge-of-Ethernet-interface

[VHDL-FPGA-Verilog] sgmii_latest.tar

[VHDL-FPGA-Verilog] sgmii_latest[1].tar

[OS program] kc705_temac__to_sgmii

[source in ebook] 88E6182_MV-S102630-00D[1]

[Linux-Unix] cvmx-helper-sgmii

[Linux-Unix] cvmx-helper-sgmii

[VHDL-FPGA-Verilog] sgmii

[VHDL-FPGA-Verilog] kcu105_sgmii_over_lvds

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