Location:
Search - sd device core
Search list
Description: 东芯IVSEP3203F50移动终端应用处理器用户手册
第1 章 东芯IV SEP3203F50 概述.
第2 章 ARM7TDMI 内核
第3 章 EMI 外部存储器接口
第4 章 片上SRAM
第5 章 时钟与功耗管理模块PMC
第6 章 LCD 控制器
第7 章 MMA 多媒体加速器
第8 章 DMA 控制器
第9 章 INTC 中断控制器.
第10 章 RTC 实时时钟控制器.
第11 章 TIMER 通用定时器
第12 章 UART 通用异步收发器.
第13 章 SPI 串行外设接口
第14 章 USB 设备接口
第15 章 PWM 脉冲调制器.
第16 章 多媒体卡控制器MMC/SD
第17 章 AC 97 控制器
第18 章 GPIO 通用输入输出.-East Core IVSEP3203F50 mobile terminal application processor User Manual Chapter 1 outlines the East Core IV SEP3203F50. Chapter 2 ARM7TDMI cores Chapter 3 EMI External Memory Interface Chapter 4 on-chip SRAM Chapter 5 clock and power management module PMC Chapter 6 LCD Controller Chapter 7 MMA Multimedia Accelerator Chapter 8 DMA Controller Chapter 9 INTC interrupt controller. Chapter 10 RTC real time clock controller. Chapter 11 General TIMER timer Chapter 12 UART Universal Asynchronous Receiver Transmitter. No. Chapter 13 SPI Serial Peripheral Interface Chapter 14 USB Device Interface Chapter 15 PWM pulse modulator. Chapter 16 Multimedia Card controller MMC/SD Chapter 17 AC 97 controller Chapter 18 GPIO General Purpose Input Output.
Platform: |
Size: 1824768 |
Author: zk |
Hits:
Description: verilog source code for SD card SLAVE DEVICE IP-Core
Platform: |
Size: 15360 |
Author: Antti Lukats |
Hits:
Description: 基于wishbone总线的SD Card IP Core,有Verilog和VHDL两种语言版本,包含了FIFO和DMA两种实现方式,是开源的IP Core-Based on the wishbone bus SD Card IP Core, there are two language versions of Verilog and VHDL, including the FIFO and DMA implemented in two ways, is open source IP Core
Platform: |
Size: 2271232 |
Author: 张亚群 |
Hits:
Description: SMDK2413 (Samsung MCU Development Kit) for S3C2413X is a platform that is suitable for code development of SAMSUNG s S3C2413X 16/32-bit RISC microcontroller (ARM926EJ-S) for hand-held devices and general applications. The S3C2413X consists of 16-/32-bit RISC (ARM926EJ-S) CPU core, separate 8KB instruction and 8KB data cache, MMU to handle virtual memory management, LCD controller (STN & TFT), NAND flash boot loader, System Manager (chip select logic and SDRAM controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O ports, RTC, 8-ch 10-bit ADC and touch screen interface, IIC-BUS interface, IIS-BUS interface, USB host, USB device, SD host & multimedia card interface, ATA Interface, IrDA, Camera Interface, Watch Dog Timer, 2-ch SPI and PLL for clock generation. The SMDK2413 consists of S3C2413X, boot EEPROM (flash ROM), SDRAM, LCD interface, two serial communication ports, configuration switches, JTAG interface and status LEDs.
Platform: |
Size: 2135040 |
Author: fateme |
Hits: