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[Other resourceDMA

Description: This example provides a description of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data buffer stored as constant in the Flash memory to another buffer in the RAM memory. The received data are stored in the DST_Buffer. The DMA channel transfer complete interrupt is enabled to generate an interrupt at the end of the buffer transfer. As soon as the transfer is completed an interrupt is generated and in the DMA channel interrupt routine the transfer complete interrupt pending bit is cleared. The data counter is stored before and after the transfer to show that all data has been transfered. TransferStatus gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED
Platform: | Size: 508171 | Author: kz02bcxg | Hits:

[Other resourced169_dma

Description: D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger Description A 32 byte block from 220h-240h is transfered to 240h-260h using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to inital software setting because DMA transfer mode 5 is used. P1.0 is toggled durring DMA transfer only for demonstration purposes. ** RAM location 0x220 - 0x260 used - always make sure no compiler conflict ** ACLK= n/a, MCLK= SMCLK= default DCO ~ 800k
Platform: | Size: 7288 | Author: 梁武潔 | Hits:

[VHDL-FPGA-VerilogSRAM@DMA实验

Description: ALTERA NIOS处理器实验,QUARTUS下用VHDL编译成处理器,然后NIOS SHELL下C 语言运行。实验SRAM和DMA调度-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, then NIOS SHELL C language runtime. Experimental SRAM and DMA Scheduling
Platform: | Size: 33792 | Author: xf | Hits:

[SCMDMA

Description: This example provides a description of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data buffer stored as constant in the Flash memory to another buffer in the RAM memory. The received data are stored in the DST_Buffer. The DMA channel transfer complete interrupt is enabled to generate an interrupt at the end of the buffer transfer. As soon as the transfer is completed an interrupt is generated and in the DMA channel interrupt routine the transfer complete interrupt pending bit is cleared. The data counter is stored before and after the transfer to show that all data has been transfered. TransferStatus gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED -This example provides a description of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data bufferstored as constant in the Flash memory to another buffer in the RAM memory.The received data are stored in the DST_Buffer.The DMA channel transfer complete interrupt is enabled to generate an interrupt atthe end of the buffer transfer. As soon as the transfer is completed an interrupt isgenerated and in the DMA channel interrupt routine the transfer complete interrupt pending bit is cleared. The data counter is stored before and after the transfer to show that all data has beentransfered.TransferStatus gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED
Platform: | Size: 507904 | Author: kz02bcxg | Hits:

[ARM-PowerPC-ColdFire-MIPSd169_dma

Description: D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger Description A 32 byte block from 220h-240h is transfered to 240h-260h using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to inital software setting because DMA transfer mode 5 is used. P1.0 is toggled durring DMA transfer only for demonstration purposes. ** RAM location 0x220 - 0x260 used - always make sure no compiler conflict ** ACLK= n/a, MCLK= SMCLK= default DCO ~ 800k-D169 Demo- DMA0 Repeated Burst to-from RAM, Software Trigger Description A 32 byte block from 220h-240h is transfered to 240h-260h using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to inital software setting because DMA transfer mode 5 is used. P1.0 is toggled durring DMA transfer only for demonstration purposes. ** RAM location 0x220- 0x260 used- always make sure no compiler conflict** ACLK= n/a, MCLK= SMCLK= default DCO ~ 800k
Platform: | Size: 7168 | Author: 梁武潔 | Hits:

[DSP programdma_ram2ram

Description: 德州儀器新款DSP TMS320C2834X 晶片 DMA RAM 對 RAM 程式設計.-Texas Instruments new DSP TMS320C2834X of DMA RAM chip RAM programming.
Platform: | Size: 4096 | Author: arno_gsm | Hits:

[Embeded-SCM Develophello_world_sgdma

Description: NIOS II下调试通过的scatter-gather DMA从SDRAM 到 片内RAM的C代码-NIOS II debugging adopted under the scatter-gather DMA from SDRAM to the chip RAM of the C code
Platform: | Size: 272384 | Author: tansuohao | Hits:

[DSP programdma_ram_to_ram

Description: TMS320F8335 DMA 数据传输 RAM to RAM
Platform: | Size: 4096 | Author: zheng | Hits:

[Otherudp_pack

Description: Nios II打包程序,通过DMA把接到AVALON从接口的双口RAM数据传到片外的SDRAM,再用UDP打包进行以太网传输-Nios II pack
Platform: | Size: 2048 | Author: 詹士波 | Hits:

[Otherudp_pack_nios

Description: Nios II打包程序,通过DMA把接到AVALON从接口的双口RAM数据传到片外的SDRAM,再用UDP打包进行以太网传输-Nios II pack
Platform: | Size: 2048 | Author: 詹士波 | Hits:

[uCOSs1c33_uCos

Description: uCos在s1c33上的移植 S1C33 MCU EPSON最新的32位微处理器系列,专用于需要高级数据处理的便捷设备。 CPU性能 核心CPU 精工EPSON32位的RISC CPU,32位内部数据处理 33MHz 105条16位固定长度的指令 16个32位多用途的寄存器 在60MHZ操作下的最小指令执行时间为16.7ns 乘法、除法和MAC指令 内存 0~128K ROM 8K RAM 片内周边电路 晶振电路 32.769K~33MHz 定时器 8位6道 16位6道和带告警功能的时钟各1道 计数器 4道,可选择时钟同步系统、异步系统、或IrDA接口 A/D转换 10位8通道 DMA 4道高速DMA 128道IDMA 通用 I/O 13位输入端口和29位I/O端口 片内周边电路 可编程时钟产生器 Prescaler 8位可编程定时器 6道 16位可编程定时器 6道 时钟定时器 1道 串口 4道 I/O端口 13位+29位 A/D转换器 ADC 直接存储器存取 DMA -S1C33 MCU EPSON latest 32-bit microprocessor series, dedicated to the convenience needs of advanced data processing equipment. CPU performance Seiko EPSON32 bit core CPU RISC CPU, 32-bit internal data processing 33MHz 105 16-bit fixed length instruction 16 multi-purpose 32-bit registers In 60MHZ operation, the minimum instruction execution time of 16.7ns Multiplication, division and the MAC Directive Memory, 0 ~ 128K ROM 8K RAM On-chip peripheral circuits 32.769K ~ 33MHz crystal oscillator circuit Timer 8 6 16 6 and clock with alarm function of each one Counter 4, optional clock synchronous system, asynchronous systems, or IrDA interfaces A/D converter 10-bit 8-channel DMA 4 道 high-speed DMA 128 道 IDMA Universal I/O 13-bit input ports and 29 I/O ports On-chip peripheral circuits Programmable Clock Generator Prescaler 8-bit programmable timer 6 16-bit programmable timer 6 Clock Timer 1 Serial 4 I/O port 13+29 bit A/D converter ADC Direct
Platform: | Size: 10240 | Author: dupeng | Hits:

[SCMDMA

Description: 本例展示了如何使用DMA把数据从FLASH传送到RAM。-This example shows how to use DMA to transfer data from FLASH to RAM.
Platform: | Size: 39936 | Author: 敏敏 | Hits:

[SCMLPC17xx_Uart0

Description: LPC17XX系列Uart模块代码吗,可以直接在芯片RAM中仿真而不需要下载到芯片Flash中。代码主要实现单片机与上位机通过串口(RS232)进行通讯和数据交换。-LPC17XX Series Uart module code you can directly simulate the RAM chip to the chip without the need to download Flash. Code main MCU and host computer via serial port (RS232) for communication and data exchange.
Platform: | Size: 75776 | Author: 楚天 | Hits:

[SCMfet140_dma_01

Description: 演示了如何操作MSP430F149单片机的DMA操作- Description: A 16 word block from 220h-240h is transfered to 240h-260h using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to inital software setting because DMA transfer mode 5 is used. P1.0 is toggled durring DMA transfer only for demonstration purposes. * RAM location 0x220- 0x260 used- always make sure no compiler conflict*
Platform: | Size: 1024 | Author: 刘成 | Hits:

[Otherdma

Description: 单片机的DMA使用方法,可以再不占用cpu的任何资源的情况下将数据写入单片机的RAM中-The use of DMA method, any resource can not occupy the CPU case to write data in the RAM of single chip
Platform: | Size: 24576 | Author: bng | Hits:

[SCMSTM32--DMA

Description: DMA传输方式无需CPU直接控制传输,功过硬件为RAM与IO设备开辟一条通道,是CPU效率大大提高-DMA transfers without CPU direct control transfer, merits and demerits of the hardware for the RAM and IO devices open up a channel, the CPU efficiency is greatly improved
Platform: | Size: 303104 | Author: ljl | Hits:

[ARM-PowerPC-ColdFire-MIPSSourceCode02_dma_xintf_to_ram_OK

Description: TMS320F28335开发板,通过DMA读取外扩Ram例程-MS320F28335 development board, through foreign expansion Ram DMA read routine
Platform: | Size: 556032 | Author: 流浪的眼 | Hits:

[Embeded-SCM DevelopAD-DMA

Description: 通过DMA把ADC结果存入DMA的RAM中,使用时可以在程序内部直接读取,比EEPROM方便快捷。包含PROTEUS仿真电路图。(Through DMA, the ADC results are stored in the DMA of RAM, and it can be read directly inside the program when using. It is more convenient and faster than EEPROM.)
Platform: | Size: 113664 | Author: 呼啦圈 | Hits:

[SCMDMA_FLASHToRAM

Description: DMA存到RAM的具体实现,单片机 STM32F401(DAM to RAM in STM32F401)
Platform: | Size: 61440 | Author: imperial_king | Hits:

[DSP programDMA_xintf_to_ram

Description: DSP28335 应用例程【片外SARAM到RAM】DMA数据传输实验教程(example for DSP28335 DMA_xintf_to_ram)
Platform: | Size: 776192 | Author: windmill4ever | Hits:
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