Description: dsp算法40例,包括fft、滤波器、谱运算等
1. 将模拟滤波器转变为数字滤波器。
2. 由得到幅频响应 。
3. 用Burg算法求AR模型的参数。
4. 由AR模型参数得到功率谱。
5. 用Levinson算法求解Yule-Walker方程以得到 阶AR模型的参数 。
6. 实现双线性Z变换。
7. 设计巴特沃斯模拟低通滤波器,求出转移函数 。
8. 设计切比雪夫I型模拟低通滤波器,求出转移函数 。
9. 直接由定义求 点复序列 的DFT 。
10.利用经典的Cooley-Tukey基2算法求复序列 的DFT 。
-dsp algorithms 40 cases, including the fft, filter, spectrum operations, etc.
1. Analog filters into digital filters.
2. Amplitude-frequency response by obtained.
3. Burg algorithm for AR model with the parameters of demand.
4. AR model parameters obtained from the power spectrum.
5. Levinson algorithm using Yule-Walker equations to get the first-order AR model
parameters.
6. The bilinear Z transform to achieve.
7. Design of Butterworth analog low-pass filter, find the transfer function.
8. Design of Chebyshev-I analog low-pass filter, find the transfer function.
9. Directly from the definition of point complex sequence of DFT.
10. The use of the classic Cooley-Tukey radix-2 algorithm is seeking re-sequence of DFT.
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Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency
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Author:小鸟动人 |
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Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 64-point FFT in VHDL. Radix 2 Decimation in Frequency
i am found of it.It s really very good! Platform: |
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Author:小鸟动人 |
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Description: 下面是找到了基2 FFT蝴蝶旋转因子的Matlab代码。代码计算的 A 相角,在图1(c)和图2(c)所示,旋转因子的因素。我建议你开始8点DIT的FFT图1(a)通过运行代码然后运行图2中的代码为16点DIF FFT(一)。-Below is the Matlab code to find radix-2 FFT butterfly twiddle factors. The code computes the A phase angle factors that are used in the twiddle factors as shown in Figure 1(c) and Figure 2(c). I suggest you start by running the code for the 8-point DIT FFT in Figure 1(a) and then run the code for the 16-point DIF FFT in Figure 2(a).
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Author:张成 |
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Description: 基4的定点FFT算法,功能都在VC2008里验证过了,有不懂得可以跟我交流、讨论。-Fixed-point radix-4 FFT algorithm, features are verified in the VC2008 in, and there do not know how to communicate with me to discuss. Platform: |
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Author:傲天 |
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Description: Abstract—Power is becoming a precious resource in
modern VLSI design, even more so than area. This paper
proposes a novel architecture for modular, scalable &reusable
hybrid constant co-efficient multiplier (KCM) circuit.
Comparison is made between of kcm and multiplier. The
implementation results show a significant improvement in
performance in terms of area, power & timing. In This paper,
we propose to design an 8-point FFT using kcm instead of
complex multiplier and multiplier. Here our goal is to
implement Radix-2 8-point FFT in hardware using hardware
language (verilog) here time constraint is measured with the
help of Xilinx FPGA (Field Programmable Gate Array).
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Author:Bahu |
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