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[Other Embeded program] NIOS_HOST_MOUSE_VGA

Description: Nios系统, 加入了VGA控制器和USB鼠标控制器-Nios system, add a VGA controller and the USB mouse controller
Platform: | Size: 909312 | Author: | Hits:

[VHDL-FPGA-Verilog] VGAdisplay

Description: VHDL入门实验。256色VGA显示驱动 开发软件Quartus II 6.0 芯片EP2c8Q208-VHDL entry experiment. 256-color VGA display driver development software Quartus II 6.0 chip EP2c8Q208
Platform: | Size: 421888 | Author: 唐锐 | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA_short

Description: 利用QUARTUS 和NOISE开发环境，在DE2开发板上开发的usb鼠标驱动，实现鼠标控制VGA的显示的功能-based on QUARTUS and NOISE using DE2 board,a program (using usb mouse control VGA )
Platform: | Size: 3299328 | Author: zoulu | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

Description: 在DE2开发板上实现的VGA输出游戏。硬件用Verilog语言编写，在Quartus上编译；软件用C语言编写，在Nios2上编译运行。把DE2板和显示器键盘连起来即可使用。-Development in the DE2 board game to achieve the VGA output. Hardware using Verilog language, compiled in the Quartus software with C language, compiled to run in Nios2. The DE2 board and display can be used to connect the keyboard.
Platform: | Size: 1627136 | Author: 符玉襄 | Hits:

[Other Games] Pingpong

Description: A Altera DE-2 ping pong game which using a PS/2 keyboard to control.VGA port of DE-2 will be the output of the game video.The sources code build from VHDL code on Quartus II.-A Altera DE-2 ping pong game which using a PS/2 keyboard to control.VGA port of DE-2 will be the output of the game video.The sources code build from VHDL code on Quartus II.
Platform: | Size: 18709504 | Author: kkddaa | Hits:

[Other] VGA_Sync_Module

Description: 基于verilog和quartus 2的vga彩条显示程序-ColorBar display Based verilog & quartus
Platform: | Size: 1024 | Author: 曹昵妹 | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

Description: 本代码为DE2开发板例程源码（EP2C35F672C6），项目基于quartus II 9.0（随板光盘为7.2版本以下，在9.0版以上编译会报错）。本项目实现一个USB画笔功能，通过FPGA控制USB口，USB口接上鼠标，通过XGA口外界显示设备，实现显示设备对鼠标移动轨迹的显示。-In this demonstration, we implement a Paintbrush application by using a USB mouse as the input device.This demonstration uses the device port of the Philips ISP1362 chip and the Nios II processor to implement a USB mouse movement detector. We also implemented a video frame buffer with a VGA controller to perform the real-time image storage and display.
Platform: | Size: 2547712 | Author: chenxin | Hits:

[VHDL-FPGA-Verilog] DE2_TV

Description: 本代码为Altera DE2开发板例程源码，（FPGA：EP2C35F672C6）quartus II 9.0以上可以编译（随板源码为7.2以下版本，在9.0以上版本编译会报错）。本代码实现一个音视频播放器TV_BOX。-This demonstration plays video and audio input a DVD player using the VGA output and audio CODEC on the DE2 board. There are two major blocks in the circuit, called I2C_AV_Config and TV_to_VGA. The TV_to_VGA block consists of the ITU-R 656 Decoder, SDRAM Frame Buffer, YUV422 to YUV444, YCrCb to RGB, and VGA Controller.
Platform: | Size: 215040 | Author: chenxin | Hits:

[VHDL-FPGA-Verilog] eluosi_game

Description: 使用Quartus II 9.1完成俄罗斯方块游戏，只要使用有VGA和键盘接口的FPGA开发板就行实现。操作简单，使用的是VHDL和Verilog语言-Use the Quartus II 9.1 to complete the tetris game, as long as you use a VGA and keyboard interface implementation of FPGA development board. The operation is simple, the use of VHDL and the Verilog language
Platform: | Size: 2177024 | Author: 韩闯 | Hits:

[Other Embeded program] vga

Description: 直接在quartus 2上运行，然后烧进试验箱，可以播放梁祝，连线就两根，一根连20MHZ，一根连蜂鸣器输入端，另一头连拓展插槽的B01，按键1控制播放、暂停，模式5，可以用点个赞，(Run it directly on quartus 2, and then burn it into the test box. You can play Liang Zhu. There are only two wires, one is 20MHz, one is buzzer input, the other is B01 of expansion slot. Press key 1 to control the play and pause. Mode 5, you can use some likes,)
Platform: | Size: 3717120 | Author: dfsadf3 | Hits:

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