Description: 推荐下载,verilog处理器设计实例.体现了结构描述和寄存器传输描述的应用
-recommend downloading Verilog processor design examples. Reflect the structure description and register transfer described in the Application Platform: |
Size: 20002 |
Author:陶玉辉 |
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Description: 推荐下载,verilog处理器设计实例.体现了结构描述和寄存器传输描述的应用
-recommend downloading Verilog processor design examples. Reflect the structure description and register transfer described in the Application Platform: |
Size: 19456 |
Author:陶玉辉 |
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Description: 另一套LC3 CPU VHDL源码及设计文档，对LC3进行了一些取舍和改造，比如NZP改为NZC，更贴近现实CPU硬件架构。按照ASM进行VHDL编码，更适合数字设计初学者学习。-Another set of LC3 CPU VHDL source code and design documents, of LC3 to a number of trade-offs and transformation, such as NZP changed NZC, more close to reality CPU hardware architecture. In accordance with the ASM to VHDL coding, digital design more suitable for beginners to learn. Platform: |
Size: 808960 |
Author:guo |
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Description: MIPS single-cycle processor design in verilog.Instruction memory to the design and initialise it with your assembly code-a. Load the data stored in the X and Y locations of the data memory into the X and Y registers.
b. Add the X and Y registers and store the result in the Z register.
c. Store the data from the Z register into the Z memory location.
d. Load the data in the Z memory location into the T register. Platform: |
Size: 2048 |
Author:chenghao wei |
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Description: 本文围绕一个包含Nios II软核处理器的可编程片上系统展开数码相机的样机设计。论文首先对样机所要达到的整体功能进行了规划，接下来并行开展了软硬件设计。在硬件方面，充分利用了所使用平台提供的SD卡插槽、键盘、数码管、SRAM等各种硬件资源，并用Verilog HDL硬件描述语言设计了样机系统所需要的VGA接口控制器、CMOS图像传感器接口控制器以及VGA显示存储器；在软件方面，本文基于Nios II软核处理器用C语言实现了SD卡的驱动、FAT文件系统的移植、VGA显视器的驱动以及BMP图片文件的转换与显示等功能，并能通过键盘操作和用户界面控制样机拍照和相片浏览。实验结果表明本样机系统设计正确，软硬件各模块绝大部分工作正常，为进一步研究数码相机的应用建立起了一个实用平台。-This paper focuses on a Nios II soft core processors, programmable on-chip system to launch a digital camera prototype design. Firstly, the overall function of the prototype to be achieved by planning, then in parallel hardware and software design. Take full advantage of the hardware side, using the platform provided by the SD card slot, keyboard, digital tube, SRAM and other hardware resources, and using Verilog HDL hardware description language to design a prototype system VGA interface controller, CMOS image sensors interface controller and the VGA display memory the software side, based on the Nios II soft core processor implemented in C, the SD card driver, and the transplantation of the FAT file system, the VGA display driver, and BMP image file conversion and display function, and through the keyboard and user interface control prototype photographs and photo browsing. The experimental results show that this prototype system is designed properly, most of the hardware and softwa Platform: |
Size: 15078400 |
Author: |
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Description: Advanced Encryption Standard(AES) implementing in a faster and secured way is expected. AES can be
implemented in software/hardware. In hardware implementation ASIC solution requires high cost and much design
time while FPGA based implementation offers lower cost, quicker and more customizable solution. This paper
represents implementing AES in FPGA with minimum latency and speedy throughput where Verilog HDL is used
to simulate the operations. Platform: |
Size: 218112 |
Author:arif |
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Description: 设计兼容51的指令集的处理器架构
编写兼容51处理器的Verilog代码 仿真
验证测试处理器的功能和性能(The design includes a processor whose instruction set is compatible to the industrial standard 8051 and its FPGA implementation. Through the analysis of instructions, I determine the CPU internal data path, and according to the data path and the timing of the functional modules, I design the CPU controller, thus completing the design of the CPU core. Writing the module code in Verilog language and running the lighting program on DE2, I validate and test the related functions and performance.) Platform: |
Size: 13230080 |
Author:PhoebeBNN
|
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