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Description: 一个真正微型操作系统,比uCOS更小,只支持16个任务,但速度更快,所占资源更少.-a real micro-operating system, even smaller than for uCOS, which only supports 16 missions, but even faster. share with fewer resources.
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Size: 3072 |
Author: wuxuekui |
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Description: altera 中基于NIOS软核系统的16点阵汉字显示程序-altera in NIOS soft-core systems based on 16 characters dot matrix display program
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Size: 300032 |
Author: 黄杰 |
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Description: 在ALTERA的DE 2 开发板上做的一个类似闪烁的彩灯，用了16个LEDR，可以直接下载到板子上运行，基于经典的开发平台Quartus II+SOPC Builder+Nios II IDE 做的，只要看了以后，你就会自己设计各种花样的彩灯闪烁的样子了.所用语言有多种，VHDL,C/C++等-DE 2 in the development of the ALTERA board to do a similar flickering lantern, with a 16 LEDR, can be directly downloaded to the board on the operation of the development platform based on the classic Quartus II+ SOPC Builder+ Nios II IDE to do, just have to look at After, you will design their own patterns of lanterns flicker the same again. There are a variety of language, VHDL, C/C++, etc.
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Size: 4208640 |
Author: liguoyin |
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Description: 基于nios2的简单的LCD显示功能，硬件平台采用的艾米电子的开发板。-Nios2 based on a simple LCD display, the hardware platform used in the development of electronic boards Amy.
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Size: 10358784 |
Author: bluesky428 |
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Description: 实现了FPGA以SPI协议传送和接受16位数据。传送过程无需Nios核干预-SPI protocol to achieve the FPGA to send and receive a 16-bit data. Nios nuclear transfer process without intervention
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Size: 1024 |
Author: shoucql |
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Description: 优秀硕士论文，课题采用现场可编程门阵列((FPGA)，设计实现了一种超高速FFT处理器。目前，使用FPGA实现FFT多采用基2和基4结构，随着FPGA规模的不断扩大，使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中，以基2-FFT搭建基16-FFT的运算核，合理安排时序，解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式，使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096点和256点的变换，两个内部运算时钟都可以达到1 OOMHz以上，其中256点变换的数据吞吐率高达1.36GHz
-a design of ultra high speed FFT processor based onFPGA is developed in this paper. At present we always use radix-2 and radix-4 tocarry out FFT. When the scale of FPGA is panding,it s possible to implement higher radix FFT. This topic uses Stratix II of Altera company to carry out a
processor of radix一16 FFT.In this design, radix-16 FFT is carried out by radix-2FFT, The design uses rational time sequence arrangement to make butterflycomputing,data transformation and memory coincide.In order to avoid the
bottleneck,pipeline pattern is used,this method acceletates the operating.Thescheme realizes the 4096-points and 256-points FFT, their operation clocks canboth reach above 100MHz. Among them ,the throughput of 256-points FFT is up to1.36GHz.
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Size: 3759104 |
Author: 陈子牙 |
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Description: The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last “X” digits ) of 8 digits.-The objective of this assignment is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last “X” digits of 8 digits.
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Size: 1361920 |
Author: wei chenghao |
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Description: Nios II VGA Controller with DMA
The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability.
The controller is capable of displaying the following resolutions:
• 640 x 480
• 800 x 600
• 1024 x 768
All resolutions can be displayed in either 16 or 24-bit color. Resolution and color depth settings are configurable in the VGA Controller configuration wizard in SOPC Builder.
The controller was designed for use with the Lancelot daughter card, available Microtronix. The Lancelot card features a Texas Instruments THS8134 video digital to analog converter (DAC) with a VGA output connector, allowing display to a VGA monitor. Also on the card are two PS2 connectors and a 1/8”audio jack. The Lancelot card attaches to the prototype headers of Nios II development boards allowing it to be driven by FPGA pins.
-Nios II VGA Controller with DMA
The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability.
The controller is capable of displaying the following resolutions:
• 640 x 480
• 800 x 600
• 1024 x 768
All resolutions can be displayed in either 16 or 24-bit color. Resolution and color depth settings are configurable in the VGA Controller configuration wizard in SOPC Builder.
The controller was designed for use with the Lancelot daughter card, available Microtronix. The Lancelot card features a Texas Instruments THS8134 video digital to analog converter (DAC) with a VGA output connector, allowing display to a VGA monitor. Also on the card are two PS2 connectors and a 1/8”audio jack. The Lancelot card attaches to the prototype headers of Nios II development boards allowing it to be driven by FPGA pins.
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Size: 59392 |
Author: Mr |
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Description: De2_build: It contains the FPGA configuration file of the comprehensive Nios II system
in Section 16.10.2 and software image files for the DE2 board. These files can be used
for quick demo or software development. Note that the files can only be used for the
DE2 board. Detailed use is explained in the pdf file within the directory
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Size: 1405952 |
Author: davido
|
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