Search - modelsim debussy

[Other resource] Debussy

Description: Debussy是NOVAS Software, Inc(思源科技)發展的HDL Debug & Analysis tool，這套軟體主要不是用來跑模擬或看波形，它最強大的功能是：能夠在HDL source code、schematic diagram、waveform、state bubble diagram之間，即時做trace，協助工程師debug。可能您會覺的：只要有simulator如ModelSim就可以做debug了，我何必再學這套軟體呢? 其實Debussy v5.0以後的新版本，還提供了nLint -- check coding style & synthesizable，這蠻有用的，可以協助工程師了解如何寫好coding style，並養成習慣。下圖所示為整個Debussy的原理架構，可歸納幾個結論： -Debussy is NOVAS Software, Inc. (source technology) development of the HDL Debug
Platform: | Size: 57293 | Author: frankyq | Hits:

[Other resource] DebussyandModelsim

Description: Debussy和Modelsim的混合使用
Platform: | Size: 223601 | Author: liujie | Hits:

[Other resource] nlint+debussy+modelsim

Description: modelsim + debussy脚本
Platform: | Size: 1570 | Author: spy | Hits:

[SCM] Debussy

Description: Debussy是NOVAS Software, Inc(思源科技)發展的HDL Debug & Analysis tool，這套軟體主要不是用來跑模擬或看波形，它最強大的功能是：能夠在HDL source code、schematic diagram、waveform、state bubble diagram之間，即時做trace，協助工程師debug。可能您會覺的：只要有simulator如ModelSim就可以做debug了，我何必再學這套軟體呢? 其實Debussy v5.0以後的新版本，還提供了nLint -- check coding style & synthesizable，這蠻有用的，可以協助工程師了解如何寫好coding style，並養成習慣。下圖所示為整個Debussy的原理架構，可歸納幾個結論： -Debussy is NOVAS Software, Inc. (source technology) development of the HDL Debug
Platform: | Size: 57344 | Author: frankyq | Hits:

[VHDL-FPGA-Verilog] DebussyandModelsim

Description: Debussy和Modelsim的混合使用 -Debussy and the mixed use ModelSim
Platform: | Size: 223232 | Author: liujie | Hits:

[Software Engineering] nlint+debussy+modelsim

Description: modelsim + debussy脚本-modelsim+ debussy script
Platform: | Size: 1024 | Author: spy | Hits:

[VHDL-FPGA-Verilog] Debussy_Modelsim

Description: Debussy for modelsim
Platform: | Size: 223232 | Author: 苗淼 | Hits:

[Other] Debussy_Modelsim

Description: debussy配合modelsim的使用方法，可以用来调试硬件代码。-debussy use with modelsim, hardware can be used to debug code.
Platform: | Size: 223232 | Author: 李阳 | Hits:

[Other] yuqix_datum

Description: i2cinterface.v是我自己写的一段verilog代码，在接口为I2C接口的芯片设计中用到。送去流过片，仅作参考用。 debussy和modelsim协同仿真.txt 用于debussy和modelsim协同仿真时参考 RTL Coding and Optimization Guide for use with Design Compiler.pdf 数提讲座（1）.wmv 数提讲座（2）.wmv这两个视频和一篇文档对数字IC前端设计师的设计提高很有帮助，如果你觉得你到瓶颈状态了，想提高的话，强烈建议好好看看。 ADVANCED ASIC CHIP SYNTHESIS中文翻译资料.ppt这也是我极力推荐的，相信学习dc的人都知道原英文文档。这个ppt相当于翻译版，对dc和pt中文详细阐述。基于DDR SDRAM控制时序分析的模型.pdf 全定制单元时序模型的建立.pdf 这两篇文档是用作建议时序模型的时候用作参考，是我花了小money买的哦。数字IC设计全程实例.pdf 本文介绍了基于标准单元库的深亚微米数字集成电路的自动化设计流程。此流程从设计的系统行为级描述或RTL 级描述开始，依次通过系统行为级的功能验证，设计综合，综合后仿真，自动化布局布线，到最后的版图后仿真. -i2cinterface.v a section of my own writing verilog code for the I2C interface in the interface used in chip design. Sent to flow through the film, only for reference. debussy and modelsim co-simulation. txt for debussy and modelsim co-simulation reference RTL Coding and Optimization Guide for use with Design Compiler.pdf Mention the number of lectures (1). Wmv Mention the number of lectures (2). Wmv the two videos, and the document is useful for the digital front-end IC designers to improve the design capability. if you think you go to bottleneck, and want to improve, then it is strongly recommended a good look. ADVANCED ASIC CHIP SYNTHESIS Chinese translation of the information. Ppt that is what I strongly recommend, I believe that everyone learning dc knows its original English document. This ppt is equivalent to its translations.It elaborates the dc and pt in Chinese . DDR SDRAM control the timing analysis based on the model. Pdf
Platform: | Size: 20989952 | Author: 喻琪 | Hits:

[VHDL-FPGA-Verilog] debussy

Description: Debussy 是NOVAS Software, Inc(思源科技)发展的HDL Debug & Analysis tool，这套软体主要不是用来跑模拟或看波形，它最强大的功能是：能够在HDL source code、schematic diagram、waveform、state bubble diagram之间，即时做trace，协助工程师debug。本文主要是介绍Debussy的使用，以及如何在Modelsim环境下生成Debussy所需要的fsdb文件-user guide for using debussy. and how to import fsdb to debussy..
Platform: | Size: 286720 | Author: liangyao | Hits:

[VHDL-FPGA-Verilog] arm7

Description: 基于arm-v4架构，兼容ARM7指令集。附录有说明文档，希望对大家有用。可以在windows上使用Debussy+modelsim的组合开发，是Verilog写的-Based on arm-v4 architecture, compatible with ARM7 instruction set. Appendix have documentation, we hope to be useful
Platform: | Size: 648192 | Author: huazemin | Hits:

[VHDL-FPGA-Verilog] Debussy-learning

Description: Debussy仿真软件使用方法及配套的实例代码。很详细的介绍了Debussy软件的使用方法，结合Modelsim来使用-Debussy simulation software use and supporting examples of code. Very detailed description of the use of Debussy software, combined with Modelsim to use
Platform: | Size: 1326080 | Author: wyzg | Hits:

[VHDL-FPGA-Verilog] modelsimPdebussy-batch-processing

Description: 内容包括采用Windows批处理方式高效执行Verilog仿真验证的方法，采用Modelsim+debussy联合仿真，里面包含一个加法器实例，批处理文件，仿真指令等。-Included with Windows batch efficient implementation of Verilog simulation method, using Modelsim+debussy co-simulation, which contains an example of an adder, batch files, simulation commands.
Platform: | Size: 129024 | Author: 唐攀 | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list