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[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决 不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I / O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407706 | Author: 刘斐 | Hits:

[Other] S3C44B0X中文技术文档

Description:

 

介    绍
三星的S3C44B0X 16/32位RISC处理器被设计来为手持设备等提供一个低成本高性能的方案。
S3C44B0X提供以下配置：2.5V ARM7TDMI 内核带有8Kcache ;可选的internal SRAM;LCD Controller(最大支持256色STN，使用LCD专用DMA)；2-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SIO； 2-ch general DMAs / 2-ch peripheral DMAs with external request pins； External memory controller (chip select logic, FP/ EDO/SDRAM controller)； 5-ch PWM timers & 1-ch internal timer；Watch Dog Timer；71 general purpose I/O ports / 8-ch external interrupt source； RTC with calendar function； 8-ch 10-bit ADC； 1-ch multi-master IIC-BUS controller； 1-ch IIS-BUS controller； Sync. SIO interface and On-chip clock generator with PLL.。
S3C44B0X采用一种新的三星ARM CPU嵌入总线结构-SAMBA2，最大达66MHZ。

Platform: | Size: 78690 | Author: ssunshine | Hits:

[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决 不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407552 | Author: 刘斐 | Hits:

[VHDL-FPGA-Verilog] mig007

Description: XILINX memory interface generator. XILINX的外部存储器接口。-XILINX memory interface generator.
Platform: | Size: 14412800 | Author: mayongfeng | Hits:

[Windows Develop] mig_23

Description: 利用ISE的core generator生成的存储器接口设计（MIG），包括example design和user design-ISE using the core generator to generate the memory interface design (MIG), including the example design and user design
Platform: | Size: 951296 | Author: 彭朋 | Hits:

[VHDL-FPGA-Verilog] c_xapp260

Description: xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.
Platform: | Size: 1123328 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilog] keypadinterfacecontroller

Description: 设计并实现一个4X8键盘接口控制器，含有时序产生电路、键盘扫描电路、弹跳消除电路、键盘译码电路、按键码存储电路、显示电路。要求：当按下某一键时，在数码管上显示该键对应的键值-Design and implement a 4X8 keypad interface controller, with timing generator circuit, the keyboard scanning circuit, bounce elimination circuit, the keyboard decoder circuit, the key code memory circuit, display circuit. Requirements: When you press a key, the LED display key corresponding to the key
Platform: | Size: 6144 | Author: zhuimeng | Hits:

[VHDL-FPGA-Verilog] c_wp260

Description: 利用 Xilinx FPGA 和存储器接口 生成器简化存储器接口-Using Xilinx FPGA and the memory interface generator to simplify memory interface
Platform: | Size: 1094656 | Author: | Hits:

[Embeded-SCM Develop] MB90092-C

Description: MB90092多字符叠加器演示程序，希望可以作为相互学习和借鉴的好东东。-MB90092 is the Fujitsu company produces character superpose chip, used in the TV or TFT LCD display screen to display text and graphics control. MB90092 integrated within the display memory ( VRAM ), external font interface and a video signal generator, the external connection few components can achieve synchronization or external synchronization Chinese characters and graphics display.
Platform: | Size: 40960 | Author: 范攻 | Hits:

[Software Engineering] 1

Description: 利用Xilinx FPGA和存储器接口生成器简化存储器接口-And the use of Xilinx FPGA Memory Interface Generator simplifies memory interface
Platform: | Size: 1123328 | Author: 王王 | Hits:

[Other Embeded program] SMG-driver

Description: * 功能：图形液晶240*128驱动(型号为SMG240128A)。32K显示存，0000H-7FFFH地址。显示是横向字节，高位 * 在前。 * 说明：图形液晶采用T6963C为LCD控制芯片，内带负压产生器，单5伏供电，并行接口(使用LPC2210驱动)。-* Function: Graphic LCD 240* 128 drive (model SMG240128A). 32K display memory, 0000H-7FFFH address. Shows a horizontal bytes, high* first.* Note: T6963C graphic LCD using the LCD controller chip, which with negative pressure generator, a single 5-volt power supply, parallel interface (using LPC2210 driver).
Platform: | Size: 1157120 | Author: name | Hits:

[Other] c5131-usb-kbd-stand-alone-1_0_2

Description: he MAX7456 single-channel, monochrome on-screen display (OSD) generator is preloaded with 256 characters and pictographs, and can be reprogrammed in-circuit using the SPI port. The SPI-compatible serial interface programs the operating modes, the display memory, and the character memory. Read capability permits both write verification and reading of the Status (STAT), Display Memory Data Out (DMDO), and Character Memory Data Out (CMDO) registers. For detailed information on the MAX7456 registers and memory organization, refer to the product data sheet and to application note 4117,
Platform: | Size: 66560 | Author: coyote22 | Hits:

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