Description: vc开发的PCI总线加密卡
PCI开发卡主要由PCI9054、93C56、16M晶振和相应的跳线、控制地址数据线等部分组成。PCI9054是PLX公司的PCI主模式桥芯片，具体芯片的说明请见Data Book；93C56是EERPOM，用于向PCI9054的初始化设置信息；16M晶振向9054提供总线时钟和CPLD7128S提供时钟；跳线用于PCI9054的设置，控制地址数据线将PCI9054的Local Bus信号线引出来，用于实验板用。-vc development of the PCI bus card encryption PCI card developed by PCI9054, 93C56, 16M crystal and the corresponding patch cords, control address data line components. PLX PCI9054 is the main mode PCI bridge chip, specific chip See Note Data Book; 93C56 is EERPOM, used to PCI9054 initialization information; 16M crystal oscillator to provide 9,054 CPLD7128S Bus clock and clock; Jumper settings for the PCI9054, control data lines to address the PCI9054 Local Bus signal line leads, the board used for experiments. Platform: |
Size: 869744 |
Author:万宴宾 |
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Description: PCI是一种高性能的局部总线规范，可实现各种功能标准的PCI总线卡。本文简要介绍了PCI总线的特点、信号与命令，提出了一种利用高速FPGA实现PCI总线接口的设计方案。
-PCI is a high-performance local bus standard, achievable standards for the various functions of PCI cards. This paper describes the features of the PCI bus, the signal with the order, A proposed high-speed FPGA PCI bus interface design. Platform: |
Size: 474283 |
Author:yaoming |
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Description: PCI-to-PCI Bridge Architecture Specification Revision 1.1
This specification establishes the requirements that a PCI-to-PCI bridge must meet to be compliant to this specification and the PCI Local Bus Specification. In addition, the requirements for optional extensions are specified. This specification does not describe the implementation details of any particular requirement or optional feature of a PCI-to-PCI bridge, nor is it a goal of this specification to describe any particular PCI-to-PCI bridge implementation. However, some recommendations are provided for some implementation-specific features that can be provided by a PCI-to-PCI bridge.-PCI-to-PCI Bridge Architecture Specific ation Revision 1.1 This specification establi shes the requirements that a PCI-to-PCI bridge must meet to be compliant to this specification and the PCI Local Bus Specification. In additio n, the requirements for optional extensions are s pecified. This specification does not describ e the implementation details of any particular requirement or optional feature of a PCI-to-PC I bridge, nor is it a goal of this specification to describ e any particular PCI-to-PCI bridge implementa tion. However, some recommendations are provided for some The need lementation-specific features that can be pro vided by a PCI-to-PCI bridge. Platform: |
Size: 359619 |
Author:asci |
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Description: The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus standard
which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering performance
more than adequate for the most demanding
applications such as full-motion video. Platform: |
Size: 6777237 |
Author:丰毅 |
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Description: vc开发的PCI总线加密卡
PCI开发卡主要由PCI9054、93C56、16M晶振和相应的跳线、控制地址数据线等部分组成。PCI9054是PLX公司的PCI主模式桥芯片，具体芯片的说明请见Data Book；93C56是EERPOM，用于向PCI9054的初始化设置信息；16M晶振向9054提供总线时钟和CPLD7128S提供时钟；跳线用于PCI9054的设置，控制地址数据线将PCI9054的Local Bus信号线引出来，用于实验板用。-vc development of the PCI bus card encryption PCI card developed by PCI9054, 93C56, 16M crystal and the corresponding patch cords, control address data line components. PLX PCI9054 is the main mode PCI bridge chip, specific chip See Note Data Book; 93C56 is EERPOM, used to PCI9054 initialization information; 16M crystal oscillator to provide 9,054 CPLD7128S Bus clock and clock; Jumper settings for the PCI9054, control data lines to address the PCI9054 Local Bus signal line leads, the board used for experiments. Platform: |
Size: 882688 |
Author:万宴宾 |
Hits:
Description: PCI是一种高性能的局部总线规范，可实现各种功能标准的PCI总线卡。本文简要介绍了PCI总线的特点、信号与命令，提出了一种利用高速FPGA实现PCI总线接口的设计方案。
-PCI is a high-performance local bus standard, achievable standards for the various functions of PCI cards. This paper describes the features of the PCI bus, the signal with the order, A proposed high-speed FPGA PCI bus interface design. Platform: |
Size: 474112 |
Author:yaoming |
Hits:
Description: PCI-to-PCI Bridge Architecture Specification Revision 1.1
This specification establishes the requirements that a PCI-to-PCI bridge must meet to be compliant to this specification and the PCI Local Bus Specification. In addition, the requirements for optional extensions are specified. This specification does not describe the implementation details of any particular requirement or optional feature of a PCI-to-PCI bridge, nor is it a goal of this specification to describe any particular PCI-to-PCI bridge implementation. However, some recommendations are provided for some implementation-specific features that can be provided by a PCI-to-PCI bridge.-PCI-to-PCI Bridge Architecture Specific ation Revision 1.1 This specification establi shes the requirements that a PCI-to-PCI bridge must meet to be compliant to this specification and the PCI Local Bus Specification. In additio n, the requirements for optional extensions are s pecified. This specification does not describ e the implementation details of any particular requirement or optional feature of a PCI-to-PC I bridge, nor is it a goal of this specification to describ e any particular PCI-to-PCI bridge implementa tion. However, some recommendations are provided for some The need lementation-specific features that can be pro vided by a PCI-to-PCI bridge. Platform: |
Size: 359424 |
Author:asci |
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Description: PCI局部总线的中文教程，可以加快你对PCI总线通讯协议的学习理解。-PCI Local Bus Guide in Chinese, you can speed up your PCI bus communication protocol of the study and understanding. Platform: |
Size: 1171456 |
Author:何风 |
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Description: The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus standard
which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering performance
more than adequate for the most demanding
applications such as full-motion video.-The PCI Local bus concept was developed to breakthe PC data I/O bottleneck and clearly opens the doorto increasing system speed and expansion capabilities.The PCI Local bus moves high speed peripheralsfrom the I/O bus and places them closer to the system sprocessor bus, providing faster data transfersbetween the processor and peripherals. The PCI Localbus also addresses the industry s need for a bus standardwhich is not directly dependent on the speed, size and type of system processor. It represents thefirst microprocessor independent bus offering performancemore than adequate for the most demandingapplications such as full-motion video. Platform: |
Size: 6776832 |
Author:丰毅 |
Hits:
Description: The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus standard
which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering performance
more than adequate for the most demanding
applications such as full-motion video.
Hardware reference-The PCI Local bus concept was developed to breakthe PC data I/O bottleneck and clearly opens the doorto increasing system speed and expansion capabilities.The PCI Local bus moves high speed peripheralsfrom the I/O bus and places them closer to the system sprocessor bus, providing faster data transfersbetween the processor and peripherals. The PCI Localbus also addresses the industry s need for a bus standardwhich is not directly dependent on the speed, size and type of system processor. It represents thefirst microprocessor independent bus offering performancemore than adequate for the most demandingapplications such as full-motion video.Hardware reference Platform: |
Size: 2121728 |
Author:丰毅 |
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Description: The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus standard
which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering performance
more than adequate for the most demanding
applications such as full-motion video.
User Manual-The PCI Local bus concept was developed to breakthe PC data I/O bottleneck and clearly opens the doorto increasing system speed and expansion capabilities.The PCI Local bus moves high speed peripheralsfrom the I/O bus and places them closer to the system sprocessor bus, providing faster data transfersbetween the processor and peripherals. The PCI Localbus also addresses the industry s need for a bus standardwhich is not directly dependent on the speed, size and type of system processor. It represents thefirst microprocessor independent bus offering performancemore than adequate for the most demandingapplications such as full-motion video.User Manual Platform: |
Size: 3303424 |
Author:丰毅 |
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Description: The Lite Evaluation/Demonstration Kit is intended to illustrate use of the
AN3042. The AN3042 is compliant to the PCI 2.1 Local Bus specification.
Included in the kit is a PCI add-in card, Windows drivers, demonstration
applications, and documentation of the hardware and software provided. The
microprocessor used on the PCI add-in card is the Motorola MPC860. The
applications themselves serve as documentation on how to interface with the
drivers, and also may be used to test the AN3042 on the user s prototype board.
Platform: |
Size: 4328448 |
Author:szliu |
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Description: 本书介绍了PCI局部总线的基本概念,功能,操作规则和使用方法-The book introduced the PCI local bus of the basic concepts, functions, operation rules and the use of methods Platform: |
Size: 3576832 |
Author:Twm |
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Description: 内有一PCI 主 和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。
本PCI_HOST目前支持：
1、 对目标PCI_T进行配置；
2、 对目标进行单周期读写；
3、 可以工作在33MHZ和66MHZ
4、 支持目标跟不上时插入最长10时钟的等待。
ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的-There is a PCI from PCI proprietors, PCI TARGET is open source, is the project document, there is simulation project, for use. Feel good about the recommendation. The PCI_HOST currently supports: 1, on the target configuration PCI_T 2, on the target for single-cycle read and write 3, can work in the 33Mhz and 66MHZ 4, to support the goals behind to insert a maximum of 10 clock hours of waiting. ALTERA the PCI even charges! ! ! Inside simulation software debugging for a long time, and finally had transferred to the download on the sudden pop-up window that contains a limited IP CORE, is to restrict the use of Platform: |
Size: 2712576 |
Author: |
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Description: 本文针对数控系统的工作特点和要求,通过对TI公司DSP芯片TMS320LF2407A和Cypress公司PCI接口芯片CY7C09449PV-AC的功能和特点进行深入分析,设计了一种基于PCI局部总线的步进电机运动控制卡-In this paper, numerical control system characteristics and requirements, through the DSP of TI company TMS320LF2407A and Cypress chip PCI interface chip companies CY7C09449PV-AC' s functions and features in-depth analysis, design of a PCI local bus based on the stepper motor motion control card Platform: |
Size: 190464 |
Author:将建 |
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Description: verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输-The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus
and the PCI local bus. It consists of two independent units, one handling transactions
originating on the PCI bus, the other one handling transactions originating on the
WISHBONE bus. Platform: |
Size: 13253632 |
Author:yemao |
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Description: 可以在Altera QuartusII下编译的Open Cores PCI桥源代码，是经过多天辛勤整理修改才完成的-Open Cores PCI bridge source code that can be compiled at Altera QuartusII. Modified under many days of hard work Platform: |
Size: 683008 |
Author:Joe |
Hits:
Description: Formal Verication of the PCI Local Bus Using Verilog-Formal Verication of the PCI Local Bus Using Verilog Platform: |
Size: 14336 |
Author:webking |
Hits:
Search - local bus of pci