Description: 里面是5个关于交织器的源代码,有兴趣的可以下来学习一下-There is a 5 on the interleaver of the source code, are interested in learning what can be down Platform: |
Size: 11264 |
Author:吴雨彤 |
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Description: This is a convolutional interleaver code written in verilog, the ram is sram with ram_ncs, ram_nwe, ram_noe characters. Platform: |
Size: 2048 |
Author:tomsontiger |
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Description: 交织编码器的verilog代码实现,此外有testbench和波形。-the verilog code for the interleave encoder, with the testbench code and waveform screen print. Platform: |
Size: 64512 |
Author:Yang Jie |
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Description: 交织程序,用verilog编写,主要用于通信当中,希望对大家有帮助-Interwoven program, written in verilog, mainly used for communication among everyone Platform: |
Size: 236544 |
Author:牧童 |
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Description: 完成通信系统中数据交织器的设计的设计,要求用Verilog HDL编程,包括源程序,仿真波形和实验结果及分析结论等。
-Completed the design of the communication system data interleaver design requirements using Verilog HDL programming, including source code, simulation waveforms and experimental results and conclusions. Platform: |
Size: 1368064 |
Author:林健 |
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Description: 完成通信系统中数据交织器的设计的设计,要求用Verilog HDL编程,在DE2平台上实现,在示波器上显示观察。-Complete data communication system Interleaver Design for the design, requirements using Verilog HDL programming, implemented on the DE2 platform, observed on the oscilloscope display. Platform: |
Size: 1370112 |
Author:林健 |
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Description: This the code for the interleaver and the deinterleaver in the verilog code.-This is the code for the interleaver and the deinterleaver in the verilog code. Platform: |
Size: 2048 |
Author:rion |
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