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[Other resource] hdb3_verilog

Description: modelsim工程，用verilog实现的HDB3编码，以及测试程序testbench-modelsim works with verilog realized HDB3 coding, and testing procedures testbench
Platform: | Size: 23041 | Author: chengroc | Hits:

[VHDL-FPGA-Verilog] hdb3_verilog

Description: modelsim工程，用verilog实现的HDB3编码，以及测试程序testbench-modelsim works with verilog realized HDB3 coding, and testing procedures testbench
Platform: | Size: 22528 | Author: chengroc | Hits:

[VHDL-FPGA-Verilog] HDB3(verilog)

Description: HDB3_verilog编码程序,附有文字解说,格式整齐,便于观看-HDB3_verilog coding procedures
Platform: | Size: 4096 | Author: 赵溪山 | Hits:

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