Search - fpga routing

[VHDL-FPGA-Verilog] verilog

Description: 北大微电子学系于敦山老师的课件，介绍Verilog HDL、Cadence Verilog仿真器、可综合的Verilog HDL、设计举例、自动布局布线工具、Verilog的词汇约定等内容-Department of Microelectronics, Peking University in the teacher s courseware mts on Verilog HDL, Cadence Verilog simulator can be integrated Verilog HDL, design, for example, automatic placement and routing tools, Verilog, etc. terms agreed
Platform: | Size: 1550336 | Author: 唐进 | Hits:

[VHDL-FPGA-Verilog] VPR_HET

Description: 用于学术研究的FPGA布局布线软件VPR-For academic research in FPGA placement and routing software VPR
Platform: | Size: 865280 | Author: 暗示 | Hits:

[GPS develop] FPGAdatatransport

Description: 本文设计的FPGA模块需要对GPS、便携打印机和串口数据进行处理，将详细介绍如何设计FPGA和不同外设之间的数据传输。同时，在RTL编码中，编写使综合与布局布线效果更佳的代码。-In this paper, the design of FPGA modules need for GPS, portable printers, and serial data processing, will be details on how to design FPGA and data transfer between peripherals. At the same time, RTL coding, synthesis and preparation to make better placement and routing code.
Platform: | Size: 11264 | Author: zhanyi | Hits:

[Other] VPR_HET

Description: VPR布局布线源码，集成电路中关于FPGA内部布局布线的广泛运用的部分-VPR placement and routing source
Platform: | Size: 1876992 | Author: 梁军军 | Hits:

[VHDL-FPGA-Verilog] router_routing

Description: 片上网络NOC基于fpga实现的，routing模块。-NOC-chip networks realized fpga-based, routing module.
Platform: | Size: 1024 | Author: 巴音 | Hits:

[VHDL-FPGA-Verilog] Hardware_Speedup_DSP_FPGA

Description: 现场可编程门阵列（FPGA）已经不再单纯应用在芯片与系统之间的直接互联层，在软件无线电（SDR）中，FPGA逐渐用做通用运算架构来实现硬件加速单元，在降低成本和功耗的基础上提升性能表现。SDR调制解调器的典型实现包括通用处理器（GPP）、数字信号处理器（DSP）和FPGA。而且，FPGA架构可以结合专用硬件加速单元，用来卸载GPP或DSP。软核微处理器可以结合定制逻辑，扩展其内核，也可以将分立的硬件加速协处理器添加到系统中。此外，还可将通用布线资源放在FPGA中，这些硬件加速单元可以并行运行，进一步增强系统的整体运算输出能力-Field programmable gate array (FPGA) is no longer a simple chip and system used in the direct interconnection between the layers, in the Software Defined Radio (SDR) in, FPGA increasingly used as general-purpose computing architecture to achieve hardware acceleration units to reduce costs in and power consumption based on the performance upgrade. SDR modem to achieve a typical general-purpose processor, including (GPP), digital signal processor (DSP) and FPGA. Moreover, FPGA architecture can be combined with dedicated hardware acceleration units to uninstall GPP or DSP. Soft-core microprocessors can combine custom logic and to expand its core, it can be the separation of hardware-accelerated co-processor added to the system. In addition, resources can also be placed on general-purpose FPGA routing, these hardware acceleration units can be run in parallel, to further enhance the overall computing system, the output capacity
Platform: | Size: 261120 | Author: gg | Hits:

[MPI] 09_alloc

Description: 一个自己用verilog写的路由仲裁器的程序，基于fpga。-Own use verilog to write a routing arbiter of the program, based on fpga.
Platform: | Size: 35840 | Author: DYP | Hits:

[VHDL-FPGA-Verilog] FPGA_CPLD_Design_Tools_Xilinx_ISE_5_X_use_Xiangjie

Description: 本书以FPGA/CPLD设计流程为主线，阐述了如何合理利用ISE设计平台集成的各种设计工具，高效地完成FPGA/CPLD的设计方法与技巧。全书在介绍FPGA/CPLD概念和设计流程的基础上，依次论述工程管理与设计输入、仿真、综合、约束、实现与布局布线、配置调试等主要设计步骤在ISE集成环境中的实现方法与技巧。本书立足工程实践，结合作者多年工作经验，选用大量典型实例，并配有一定数量的练习题。本书配套光盘收录了所有实例的完整工程目录、源代码、详细操作步骤和使用说明，利于读者边学边练，提高实际应用能力。本书可作为高等院校通信工程、电子工程、计算机、微电子与半导体学等专业的教材，也可作为硬件工程师和IC工程师的实用工具书。 -The book FPGA/CPLD design flow as the main line, explains how the rational use of ISE design platform integrates a variety of design tools and efficient completion of FPGA/CPLD design methods and techniques. In introducing the book FPGA/CPLD concept and design process, based on the order discussed in project management and design entry, simulation, synthesis, constraints, implementation and layout routing, configuration, debugging and other major steps in the ISE design environment, the realization of an integrated approach and techniques. This book based on engineering practice, combined with the author many years of work experience, use a large number of typical examples, and is equipped with a number of exercises. This book package CD-ROM contains all the instances of a complete project directory, source code, detailed steps and instructions for use, which will help the reader to learn while training to improve the practical application ability. This book can serve as institutio
Platform: | Size: 34953216 | Author: cai | Hits:

[AI-NN-PR] 112235

Description: 一种基于迷宫算法的有效FPGA布线方法一种基于迷宫算法的有效FPGA布线方法-An efficient Method based on maze routing algorithm Compact for the FPGA
Platform: | Size: 347136 | Author: ilppgo | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA中差分信号的使用，一份关于FPGA布线资料-In the use of differential signal FPGA a FPGA routing information on the
Platform: | Size: 169984 | Author: liang | Hits:

[VHDL-FPGA-Verilog] Timing_Closure

Description: 一份FPGA布局布线的时序约束资料，中文描述-A FPGA placement and routing information on the timing constraints, the Chinese describe the
Platform: | Size: 1937408 | Author: liang | Hits:

[VHDL-FPGA-Verilog] vhdl-clock-out-nodelay

Description: output an FPGA internal clock signal on an output port without additional routing delay
Platform: | Size: 1024 | Author: bfuclin | Hits:

[VHDL-FPGA-Verilog] crossroute-R4

Description: As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstalk has primarily been a concern for ASICs, multi-chip modules, and custom chips, however, it will soon become a concern in FPGAs. In this paper, we describe the first published crosstalk-aware router that targets FPGAs. We show that, in a representative FPGA architecture implemented in a 0.18μm technology, the average routing delay in the presence of crosstalk can be reduced by 7.1 compared to a router with no knowledge of crosstalk. About half of this improvement is due to a tighter delay estimator, and half is due to an improved routing algorithm.-As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstalk has primarily been a concern for ASICs, multi-chip modules, and custom chips, however, it will soon become a concern in FPGAs. In this paper, we describe the first published crosstalk-aware router that targets FPGAs. We show that, in a representative FPGA architecture implemented in a 0.18μm technology, the average routing delay in the presence of crosstalk can be reduced by 7.1 compared to a router with no knowledge of crosstalk. About half of this improvement is due to a tighter delay estimator, and half is due to an improved routing algorithm.
Platform: | Size: 199680 | Author: sia | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 用于FPGA routing and placement, 在research 中多应用。文件包括data structure 和程序源代码-FGPA research project based on the FPGA routing and placement
Platform: | Size: 1611776 | Author: Sun Yanan | Hits:

[Books] A-survey-of-Network-on-chip

Description: 用以说明和分析近几年来关于FPGA器件上连线资源的架构，主要针对NoC架构做出分析-to describe and analyze the architecture of routing resource on FPGA，especially the architecture of NoC Network interconnection
Platform: | Size: 1173504 | Author: 小毛驴 | Hits:

[Linux-Unix] vpr6.0

Description: VPR6.0，多伦多大学的FPGA布局布线工具，2012年2月发布。-VPR6.0，placement and routing tool for FPGA designed by toronto university，2012.2.19 release。
Platform: | Size: 377856 | Author: 周文豪 | Hits:

[VHDL-FPGA-Verilog] TCAM

Description: FPGA VERILOG TCAM (ternary content addressable memory)是一种三态内容寻址存储器，主要用于快速查找ACL、路由等表项。-FPGA VERILOG TCAM (ternary content addressable memory) is a ternary content addressable memory, mainly used to quickly find ACL, routing entries.
Platform: | Size: 987136 | Author: 网窝囊 | Hits:

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[VHDL-FPGA-Verilog] verilog

[VHDL-FPGA-Verilog] VPR_HET

[GPS develop] FPGAdatatransport

[Other] VPR_HET

[VHDL-FPGA-Verilog] router_routing

[VHDL-FPGA-Verilog] Hardware_Speedup_DSP_FPGA

[MPI] 09_alloc

[VHDL-FPGA-Verilog] FPGA_CPLD_Design_Tools_Xilinx_ISE_5_X_use_Xiangjie

[AI-NN-PR] 112235

[VHDL-FPGA-Verilog] FPGA

[VHDL-FPGA-Verilog] Timing_Closure

[VHDL-FPGA-Verilog] vhdl-clock-out-nodelay

[VHDL-FPGA-Verilog] crossroute-R4

[VHDL-FPGA-Verilog] FPGA

[Books] A-survey-of-Network-on-chip

[Linux-Unix] vpr6.0

[VHDL-FPGA-Verilog] TCAM

[Program doc] route-algorithm-fpga-imp

[VHDL-FPGA-Verilog] reconf. router code xylinx

[VHDL-FPGA-Verilog] NoC Verilog Codes

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