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[Driver Developfpga

Description: VHDL写的fpga程序,可产生三角波,方波据此波,正弦波,可实现任意频偏的调频,调相,调幅-Fpga write VHDL program can generate triangle wave, square wave accordingly wave, sine wave, can achieve any frequency offset of the FM, PM, AM
Platform: | Size: 12225536 | Author: 陈俊涵 | Hits:

[VHDL-FPGA-Verilogdds_sin

Description: 此程序是基于fpga的多功能的信号源程序,能调相,调频,调幅等。-This program is based on fpga s versatile signal source can be PM, FM, AM and so on.
Platform: | Size: 3396608 | Author: xiaoming | Hits:

[VHDL-FPGA-VerilogASIC_PMSM

Description: 用ASIC芯片完成永磁同步电机的矢量控制系统的设计。-The FOC to PMSM use ASIC.
Platform: | Size: 9318400 | Author: 李全武 | Hits:

[VHDL-FPGA-Verilogbiyeshejiyuandaima

Description: 智能打铃系统源代码 功能题目名称: 基于FPGA的智能打铃系统的设计 基本要求:1、基本计时和显示功能(用12进制显示):包括上下午标志; 2、能够设置当前时间; 3、能够实现基本打铃功能,规定: 上午06:00起床铃,打铃5s,停2s,再打铃5s; 下午10:00熄灯铃,打铃5s,停2s,再打铃5s。 重点研究问题:进行模块划分,并实现各模块的功能; -Smart features a bell system source code Title Name: FPGA-based design of intelligent systems ringing the basic requirements: 1, the basic timing and display functions (with 12 hexadecimal display): Includes logo on the afternoon 2, to set the current time 3 , rang the bell to achieve the basic functions, provides: 06:00 am wake up bell ringing 5s, stop 2s, call bell 5s 10:00 pm lights out bell ringing 5s, stop 2s, call bell 5s. Key research questions: the module division, and to achieve the function of each module
Platform: | Size: 9216 | Author: 黄婷婷 | Hits:

[Linux-Unixpm-tegra30

Description: altera FPGA driver for Linux v2.13.6.
Platform: | Size: 1024 | Author: zunnietx | Hits:

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