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[VHDL-FPGA-Verilogbinary_to_gray

Description: 将二进制数转化为格备码,4位并行。binary_input为二进制数输入, gray_output为格雷码输出。-Will be converted into binary code grid preparation, 4-bit parallel. binary_input for binary input, gray_output for the Gray code output.
Platform: | Size: 12288 | Author: changhe | Hits:

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