Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - fft using fft core

Search list

[Mathimatics-Numerical algorithms] 81i_radix2_xfft1024_v3_2

Description: xilinx FFT using ip core project navigator-xilinx ip using FFT core project navigator
Platform: | Size: 1433181 | Author: ningchang | Hits:

[Mathimatics-Numerical algorithms] 81i_radix2_xfft1024_v3_2

Description: xilinx FFT using ip core project navigator-xilinx ip using FFT core project navigator
Platform: | Size: 1432576 | Author: ningchang | Hits:

[VHDL-FPGA-Verilog] cfft

Description: CFFT是一个数据宽度和点数都可配置的基4 FFT core,用VHDL实现-CFFT is a data width and the base points can be configured 4 FFT core, using VHDL realize
Platform: | Size: 168960 | Author: | Hits:

[Graph program] FFT

Description: 利用傅立葉轉換計算核心的部份，再用sin,cos的方式以表顯示。-Calculated using Fourier transform part of the core, and then sin, cos the manner shown in the table below.
Platform: | Size: 2048 | Author: shin | Hits:

[VHDL-FPGA-Verilog] fft_gen

Description: FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results. here is what I do: 1- from core generator I choose fft core and create .vhd & .vho & .xco files. 2- I add the .xco & .vhd files to my project. 3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity of the wrapper file.-FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results. here is what I do: 1- from core generator I choose fft core and create .vhd & .vho & .xco files. 2- I add the .xco & .vhd files to my project. 3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity of the wrapper file.
Platform: | Size: 6144 | Author: Jayesh | Hits:

[VHDL-FPGA-Verilog] cFFT

Description: CFFT is a radix-4 fast Fourier transform (FFT) core with configurable data width and a configurable number of sample points in the FFT. Twiddle factors are implemented using the CORDIC algorithm, causing the gain of the CFFT core to be different from the standard FFT algorithm. This variation in gain is not important for orthogonal frequency division modulation (OFDM) and demodulation. The gain can be corrected, to that of a conventional FFT, by applying a constant multiplying factor.
Platform: | Size: 183296 | Author: Nagendran | Hits:

[VHDL-FPGA-Verilog] pipelined_fft_64

Description: 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.
Platform: | Size: 99328 | Author: chengyungang | Hits:

[VHDL-FPGA-Verilog] fft_ip_core

Description: FFT的FPGA硬件实现，利用ALTERA公司的IP核来实现此功能,包含工程文件和相关例程-FFT hardware implementation, FPGA implementation of FFT function, using ALTERA s IP core to achieve this functionality
Platform: | Size: 299008 | Author: 李辉 | Hits:

[VHDL-FPGA-Verilog] FFT-IPCORE

Description: QUARTUSII FFT的IP核，用VHDL实现。-QUARTUSII FFT IP core using VHDL implementation.
Platform: | Size: 8720384 | Author: vanessa | Hits:

[Other] tongbu

Description: FFT实现信号的检测与同步，使用FFT做相关运算，大大缩短了了同步的复杂度和时间，这里是主代码，其他模块QUARTUS中自带有IP核，直接调用就是了-FFT signal detection and synchronization, do the relevant calculations using FFT, greatly reducing the complexity and time synchronization, here is the main code IP core comes with other modules QUARTUS directly call it
Platform: | Size: 2048 | Author: 张庭伟 | Hits:

[VHDL-FPGA-Verilog] Xilinx_FPGA_FFT_Application_Note

Description: Xilinx FPGA中FFT IP核的使用笔记，内部有FFT硬核的端口说明和具体设置以及源代码，对于数字信号处理研究人员，能图像处理、雷达成像、实时通信开发人员较多的开发时间！-Xilinx FPGA in the FFT IP core using a laptop internal hard core of the FFT port description and specific settings as well as the source code for digital signal processing, image processing, radar imaging, real-time communications developers more development time!
Platform: | Size: 1406976 | Author: 杨光 | Hits:

[VHDL-FPGA-Verilog] STFT

Description: 短时傅里叶变换的FPGA实现零重复度使用了fft的IP核设计-When the Fourier transform of the FPGA to achieve zero repeatability using fft IP core design
Platform: | Size: 1024 | Author: wang | Hits:

[Other] fft_test3

Description: matlab simulinc file for calculating xilinx fft core using system generator
Platform: | Size: 19456 | Author: suha | Hits:

[matlab] fft_ly

Description: 采用MATLAB实现定点的FFT运算，但是仿真硬件结构的IP核调用以及误差产生模式，用于仿真FPGA实现FFT运算的效果和误差来源。-FPGA to realize the company s 68013A paragraph Cypress USB chip used SLAVEFIFO read operation, the fixed-point implementation using MATLAB FFT operation, but the hardware structure of the IP core simulation calls and error generation model for simulating the effects of FPGA implementation and FFT computation sources of error.
Platform: | Size: 2048 | Author: | Hits:

[Software Engineering] kuaisufuliyebianhuan

Description: 介绍了快速Fourier变换算法(FFT)的核心思想及其算法描述,并用Matlab程序设计语言实现了FFT算法.最后,举例说明用FFT算法计算复函数f(x)的插值函数-Introduced the fast Fourier transform (FFT) algorithm and its core idea of ​ ​ the algorithm description and using Matlab programming language to implement the FFT algorithm. Finally, an example using the FFT algorithm to calculate complex function f (x) is the interpolation function
Platform: | Size: 126976 | Author: 王斌 | Hits:

[VHDL-FPGA-Verilog] fft_test

Description: ALTERA的FFT IP核时序的仿真，verilog语言。采用burst方式，FFT点数2048点-FFT IP core of timing simulation ALTERA, verilog language. Using burst mode, FFT points 2048 points
Platform: | Size: 25623552 | Author: vincentspace | Hits:

[Software Engineering] Filter-by-using-DSP-Lib

Description: stm32 cortex-m4的dsp库，包括各种滤波算法，例如FIR、IIR以及FFT等-dsp library of stm32 with cortex-m4 core which includes varies of algorithm like fir/IIR and fft etc
Platform: | Size: 173056 | Author: 邓泽林 | Hits:

[GUI Develop] fft--algorithm(CPP)

Description: fft算法的实现，包括时域抽取和频域抽取。可以帮助学生快速了解fft算法的核心思想。-This software is a implementation of fft algorithm, which includes the time-domain and frequency-domain.Using this software, students can quickly understand the core idea of fft algorithm.
Platform: | Size: 1326080 | Author: 郑篱儿 | Hits:

[VHDL-FPGA-Verilog] cf-fft

Description: 用ip核实现fft。用vhdl编写。altera的fpga-Ip core implementation using fft. Written in vhdl
Platform: | Size: 5501952 | Author: 任天鹏 | Hits:

[VHDL-FPGA-Verilog] fft_32k

Description: FFT 32K点设计实例v1.0.0自述文件 本自述文件包含以下部分： 工具要求 o Quartus II编译 o ModelSim仿真模型 o MATLAB模型(FFT 32K Point Design Example v1.0.0 README File This readme file for the Fast Fourier Transform (FFT) 32K Point Design contains information about the design example posted on the Altera Support website: http://www.altera.com/support/examples/exm-index.html Ensure that you have read the information on the design example web page before using the example. This readme file contains the following sections: o Package Contents o Tool Requirements o Quartus II Compilation o ModelSim Simulation Models o MATLAB Models o Core Directory Names o Release History o Design Examples Disclaimer o Contacting Altera)
Platform: | Size: 1120256 | Author: wsf-jv | Hits:
« 12 »

CodeBus www.codebus.net