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[Other resource] TMS320C6000DSPCacheUsersGuidespru656a

Description: TMS320C6000 DSP Cache User’s Guide-spru656a-TMS320C6000 DSP Cache User's Guide-spru6 56a
Platform: | Size: 331717 | Author: 时贵章 | Hits:

[Communication] cache.doc

Description: TMS320DM642 DSP是TI公司新近推出的一款高性能数字多媒体处理器，它的两级高速缓存（Cache）结构为高复杂度视频编码算法的高效率实现提供了有力的保证。综合考虑视频编码算法特点和Cache结构特征实现的算法，能够满足系统整体需求和指标要求
Platform: | Size: 75296 | Author: 宋恋 | Hits:

[Other resource] MyCache

Description: ADI-BF533 DSP cache的配置代码
Platform: | Size: 677136 | Author: wdz | Hits:

[Other resource] TMS320C6000

Description: TMS320C6000 DSP Cache User s Guide
Platform: | Size: 325461 | Author: 丁丁 | Hits:

[Other] cacheon5501

Description: ti dsp dsk vc5000 1-cache on 5501,02.rar-ti dsp dsk vc5000 1-cache on 5501,02. Rar
Platform: | Size: 132096 | Author: | Hits:

[DSP program] TMS320C6000DSPCacheUsersGuidespru656a

Description: TMS320C6000 DSP Cache User’s Guide-spru656a-TMS320C6000 DSP Cache User's Guide-spru6 56a
Platform: | Size: 331776 | Author: 时贵章 | Hits:

[Other Embeded program] ADSP_BF532_Cache

Description: ADI Blackfin 532 Cache配置程序 使用Visual DSP++ 3.5开发-ADI Blackfin 532 Cache configuration procedures using Visual DSP 3. 5 development
Platform: | Size: 14336 | Author: hzq | Hits:

[File Format] DDR_SDRAM_use_in_embedded

Description: 很多嵌入式系统，特别是应用于图像处理与高速数据采集等场合的嵌入式系统，都需要高速缓存大量的数据。DDR（Double Data Rate，双数据速率）SDRAM由于其速度快、容量大，而且价格便宜，因此能够很好地满足上述场合对大量数据缓存的需求。但DDR SDRAM的接口不能直接与现今的微处理器和DSP的存储器接口相连，需要在其间插入控制器实现微处理器或DSP对存储器的控制。-many embedded systems, especially for image processing and high-speed data acquisition, and so on the embedded system, Cache require large amounts of data. DDR (Double Data Rate, double-data rate) SDRAM due to its speed, large capacity, and their prices are cheaper, it can be a very good occasion to meet these massive data cache demand. But DDR SDRAM interface directly with today's microprocessor and DSP memory interface connected, During the need to insert controller microprocessor or DSP memory of the control.
Platform: | Size: 237568 | Author: joucan | Hits:

[Other] Cacheanalyse

Description: 对DSPcache利用率的分析方法，使用ccs3.0的技巧，给予c6455为例子。-DSPcache utilization of the analytical method, the use of ccs3.0 skills, c6455 given as examples.
Platform: | Size: 907264 | Author: 王立东 | Hits:

[Program doc] cache.doc

Description: TMS320DM642 DSP是TI公司新近推出的一款高性能数字多媒体处理器，它的两级高速缓存（Cache）结构为高复杂度视频编码算法的高效率实现提供了有力的保证。综合考虑视频编码算法特点和Cache结构特征实现的算法，能够满足系统整体需求和指标要求-TMS320DM642 DSP is a TI company recently introduced a high-performance digital multimedia processor, and its two-tier cache (Cache) structure for high-complexity video coding algorithms to achieve high efficiency provide a strong guarantee. Considering the characteristics of video coding algorithms and structural characteristics of Cache realize the algorithm, able to meet the system requirements of the overall demand and indicators
Platform: | Size: 74752 | Author: 宋恋 | Hits:

[Documents] DSPsCache

Description: DSPs实时视频处理中的Cache优化算法研究.pdf-DSPs in real-time video processing in the Cache Optimization Algorithm. Pdf
Platform: | Size: 183296 | Author: 金良 | Hits:

[Software Engineering] DM642EDMA

Description: DM642上的DMA性能一个简单的介绍和分析。 DM642中的DMA称为EDMA（Enhanced Direct Memory Access）,其EDMA控制器支持64个相互独立的DMA通道，每个通道都可以接受系统外设事件的触发或者CPU的指令的触发，不同DMA传输之间还可以进行连接，构成各种复杂的DMA操作，在600MHz主频时可以提供2.4GB/秒的数据吞吐量。具备的1维、2维传输模式，非常适合图像的处理。 -DMA performance on the DM642 a brief introduction and analysis. DM642 The DMA called EDMA (Enhanced Direct Memory Access), the EDMA controller to support 64 independent DMA channels, each channel would be acceptable to all system peripherals, or trigger events trigger CPU instructions, different DMA transmission of can also be used for inter-connections, constitute a complex DMA operation, in the 600MHz frequency can provide 2.4GB/s data throughput. With the 1-dimensional, 2-dimensional transport model, very suitable for image processing.
Platform: | Size: 6144 | Author: 色度 | Hits:

[Program doc] DM642-TCP.IP

Description: 高性能600MHz的TMS320DM642是可编程的数字多媒体处理器，为了了解其对于多媒体数据通信的支持，本文针对DSP芯片上的网络开发工具NDK进行了研究，测试了其在UDP传输过程中的CPU效率，对其在不同传输速率和二级缓存大小的条件下的表现给出了比较。说明了DM642是一款很适用于多媒体通信的数字信号处理器-The TMS320DM642 is a 600MHz high-performance programmable digital multimedia processor, in order to understand their data communication for multi-media support, this article on a chip for DSP development tools NDK Network conducted a study to test its presence in the UDP transmission efficiency of the CPU its at different transmission rates and secondary cache size is given under the conditions of performance are compared. Describes the DM642 is a very applicable to multimedia communications, digital signal processor
Platform: | Size: 64512 | Author: lzp | Hits:

[DSP program] MotionEstimationandItsOptimizationonDSP

Description:
Platform: | Size: 171008 | Author: wang | Hits:

[DSP program] MyCache

Description: ADI-BF533 DSP cache的配置代码-ADI-BF533 DSP cache configuration code
Platform: | Size: 676864 | Author: wdz | Hits:

[DSP program] TMS320C6000

Description: TMS320C6000 DSP Cache User s Guide
Platform: | Size: 325632 | Author: 丁丁 | Hits:

[Other] C64xx_DSP_Cache

Description: 介绍C64xx DSP Cache的资料，帮助你理解L1，l2的区别-C64xx DSP Cache introductory information to help you understand the L1, l2 distinction
Platform: | Size: 186368 | Author: 陈利聪 | Hits:

[Software Engineering] cache

Description: dsp 关于缓存优化的非常好的文档，值得一看-cache optimized dsp on a very good document, worth a visit
Platform: | Size: 74752 | Author: jinliang | Hits:

[DSP program] DEC6713_EDMA

Description: TMS320C6000 DSP EDMA　程序例子，实用的程序-TMS320C6000 DSP Cache User s Guide
Platform: | Size: 57344 | Author: NickZ | Hits:

[DSP program] intexample

Description: 关于DM6437 中断例程，没有使用DSP/BIOS，使用定时器中断来控制跑马灯-On the DM6437 interrupt routines, do not use DSP/BIOS, use the timer interrupt to control the Marquee
Platform: | Size: 399360 | Author: 段彦肖 | Hits:
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