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Description: dsp2407源程序，包括I/O读写，定时器，三角波生成等。
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Size: 82754 |
Author: xiaoqiang |
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Description: C2000系列DSP是TI公司TMS320 DSP的三大系列之一，它既具有一般DSP芯片的高速运算和信号处理能力，又和单片机一样在片内集成了丰富的外设，所以，特别适用于数字控制系统。TMS320LF/LC24系列DSP是目前C2000系列中应用最为广泛的DSP芯片。本书以TMS320LF2407A为代表，介绍其中央处理单元（CPU）和片内外围设备。全书共分10章，具体内容包括：CPU内核结构，存储器及I/O空间，事件管理器（EV），模/数转换器（ADC），串行外设接口（SPI），串行通信接口（SCI），CAN控制器模块和看门狗（WD）定时器。
本书可供从事自动控制、电气工程、计算机应用和仪器仪表等专业的科研和工程技术人员参考，也可以作为相关专业本科生和研究生选修课的参考书。
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Size: 26104831 |
Author: drjiachen |
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Description: 主要介绍DSP的I/O端口及其应用
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Size: 30720 |
Author: wanghuimtymd |
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Description: 通用CPU与DSP的主要区别
从表面上来看，DSP与标准微处理器有许多共同的地方：一个以ALU为核心的处理器、地址和数据总线、RAM、ROM以及I/O端口，从广义上讲，DSP、微处理器和微控制器（单片机）等都属于处理器，可以说DSP是一种CPU。但DSP和一般的CPU又不同：
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Size: 26112 |
Author: fexidolove@163.com |
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Description: VisualDSP++ 4 软件的破解文件,适用于adsp的dsp用户,详细用法在文件内-The crack for VisualDSP++ 4 DSP IDE development software, fits for the dsp developer for adi series DSP products, the detailed instructions is packed in the zip file
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Size: 149504 |
Author: 宋强 |
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Description: This program sets up the SPI port on the ADSP-BF533 toconfigure the AD1836 codec. The SPI port is disabledafter initialization. The data to/from the codec aretransfered over SPORT0 in I2S mode-This program sets up the SPI port on the ADSP- BF533 toconfigure the AD1836 codec. The SPI po rt is disabledafter initialization. The data t o/from the codec aretransfered over SPORT0 in I 2S mode
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Size: 10240 |
Author: 范文 |
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Description: TMS320C54X DSP 实验指导程序
实验一 常用指令实验
实验二 数据存储实验
实验三 I/O实验
实验四 定时器实验
实验五 INT2中断实验
实验六 A/D转换实验
实验七 D/A转换实验
实验八 AD/DA综合实验
-TMS320C54X DSP experimental procedures to guide an experimental common directive experimental experimental data storage is 2 three experimental testing of I/O The Experiment The Experiment 4 timer interruption five INT2 The Experiment 6 A/D converter The Experiment 7 D/A conversion The Experiment 8 AD/DA Experiment
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Size: 246784 |
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Description: This application note describes a method for developing block-oriented I/O device drivers
for applications that use the DSP/BIOS real-time kernel and includes examples that run
with Code Composer Studio v2.1 on the Texas Instruments TMS320C5402 and
TMS320C6711 DSP Starter Kits (DSKs). The device driver model presented here has
now been superceded with an updated version that supports not only block oriented
devices, but also devices such as UARTs, PCI and USB buses and Multimedia cards.
Documentation on the updated driver model as well as example drivers and source code
can be found in the Device Driver Developer s Kit product now available for download
from the TI Developer s Village.-This application note describes a method f or developing block-oriented I/O device drive rs for applications that use the DSP/BIOS real- time kernel and includes examples that run with Code Composer Studio v2.1 on the Texas Instrume nts TMS320C5402 and TMS320C6711 DSP Starter Ki ts (DSKs). The device driver model he presented 're has now been superceded with an updated version of on that supports not only block oriented device 's, but also devices such as UARTs, PCI and USB buses and Multimedia cards. Documen CVIM driver on the updated model as well as exa mple drivers and source code can be found in the D. evice Driver Developer's Kit product now availa ble for download from the TI Developer's Village .
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Size: 405504 |
Author: 陈军辉 |
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Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决
不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。
-2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
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Size: 407552 |
Author: 刘斐 |
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Description: 主要考虑处理速度、功耗、程序存储器和数据存储器的容量、片内的资源，如定时器的数量、
I/O 口数量、中断数量、DMA 通道数等。DSP 的主要供应商有TI，ADI，Motorola,Lucent
和Zilog 等，其中TI 占有最大的市场份额-major consideration processing speed, power, program memory and data memory capacity of chip resources, If the number timer, I/O export volume, the number of interruption, DMA channels, and so on. DSP major vendors are TI, ADI, Motorola, Lucent and wireless. TI which holds the largest market share
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Size: 668672 |
Author: yan |
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Description: TLV1544与TMS320VC5402通过串行口连接，此时，A／D转换芯片作为从设备，DSP提供帧同步和输入／输出时钟信号。TLV1544与DSP之间数据交换的时序图如图3所示。
开始时， 为高电平（芯片处于非激活状态），DATA IN和I/OCLK无效，DATAOUT处于高阻状态。当串行接口使CS变低（激活），芯片开始工作，I／OCLK和DATAIN能使DATA OUT不再处于高阻状态。DSP通过I／OCLK引脚提供输入／输出时钟8序列，当由DSP提供的帧同步脉冲到来后，芯片从DATA IN接收4 b通道选择地址，同时从DATAOUT送出的前一次转换的结果，由DSP串行接收。I／OCLK接收DSP送出的输入序列长度为10～16个时钟周期。前4个有效时钟周期，将从DATAIN输入的4 b输入数据装载到输入数据寄存器，选择所需的模拟通道。接下来的6个时钟周期提供模拟输入采样的控制时间。模拟输入的采样在前10个I／O时钟序列后停止。第10个时钟沿（确切的I／O时钟边缘，即上升沿或下降沿，取决于操作的模式选择）将EOC变低，转换开始。
-TLV1544 with TMS320VC5402 through serial port connectivity, at this time, A/D conversion chip as from the equipment, to provide frame synchronization DSP and input/output clock signal. TLV1544 DSP and data exchange between the chronology of the map is shown in figure 3. At the beginning of the margin (in chip-activated), and I DATA IN/OCLK invalid, DATAOUT at high resistance state. When the serial interface CS change low (activator), the chip start work, I/OCLK and DATAIN can DATA OUT is no longer in a state of high resistance. DSP through I/OCLK pin provide input/output clock 8 sequence, When the DSP from the frame synchronization pulse, the chip from the DATA IN receive four channels to choose b address, DATAOUT sent from the same time the previous conversion results from the
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Size: 1024 |
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Description: DSP的存储器和IO空间.
C240X芯片有16位地址线，可以访问3个独立的地址空
间，总计192K字。
• 程序存储器:64K字
• 数据存储器:64K字
• I/O空间:64K字,包含片内外设寄存器-DSP
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Size: 715776 |
Author: 范特西 |
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Description: dsp2407源程序，包括I/O读写，定时器，三角波生成等。-dsp2407 source code, including I/O read and write, timers, triangle-wave generation.
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Size: 82944 |
Author: xiaoqiang |
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Description: TMS320LF2407A DSP的I/O电灯实验-TMS320LF2407A DSP
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Size: 13312 |
Author: 陈启苗 |
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Description: GPIO通用I/O口DSP程序编制-GPIO Universal I/O port DSP programming
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Size: 143360 |
Author: 王力 |
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Description: K9F1208U0M 的ALE、CLE分别由DSP 的A1 和A0 控制。DSP的低8位数据线直接与闪存的I/O0-I/O7 相连，实现命令、地址和数据的传输； DSP的通用I/O口IOA2 接R/B，监测存储器的工作状态，当R/ B 处于低电平时,表示有编程、擦除或随机读操作正在进行；操作完成后, R/ B 会自动返回高电平。DSP的W E 、R D 分别接FLASH的W E 、R E ， 控制读、写操作。CS2接闪存的片选线CE。-K9F1208U0M the ALE, CLE by the DSP-A1 and A0 control. DSP s low-8 data lines directly connected with the memory of I/O0-I/O7 to achieve order, address and data transmission DSP Universal I/O port IOA2 then R/B, monitoring the work of the state of memory, when R/B at a low level indicates that there are programming, erase or random read operation is ongoing to operate after the completion, R/B will automatically return to high level. DSP-WE, RD, respectively, then FLASH the WE, RE, control of reading and writing operations. CS2 access memory chip line selection CE.
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Size: 2048 |
Author: 卢昌荣 |
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Description: 主要介绍TI公司DSP芯片硬、软件的应用与开发。对硬件不仅深入地介绍TMS320C3X和TMS320C6000两个系列的芯片，也详细地介绍了它们的各种外围芯片及其外围的扩展：存储器扩展；PCI及USB扩展、A/D与D/A扩展、数字I/O扩展及多DSP之间的通信，还给出了丰富的设计实例。在软件方面，对DSP系统的开发工具、COFF文件格式、用汇编语言和C语言进行DSP开发等做了详细介绍。最后给出了DSP的数字滤波器及FFT设计的实例。本书内容丰富、新颖，实用性强，适合从事数字信号处理（DSP）的科技人员和高校师生阅读。-TI introduces the company DSP chip hardware, software applications and development. Not only the depth of hardware TMS320C3X and TMS320C6000 introduced two series of chips, is also described in detail their various external chip and its peripheral expansion: memory expansion PCI and USB expansion, A/D and D/A expansion, digital I/O expansion and more communication between the DSP, but also gives a wealth of design examples. On the software side, on the DSP system development tools, COFF file format, using assembly language and C language for DSP development has done a detailed briefing. Finally, the DSP and the FFT of the digital filter design examples. The book is rich in content, innovative, practical, suitable for digital signal processing (DSP) of scientific and technological personnel and college students to read.
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Size: 15345664 |
Author: laojiang |
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Description: 第一章 CCS概述 1
第二章 开发一个简单的应用程序 17
第三章 开发DSP/BIOS程序 32
第四章 算法和数据测试 41
第五章 程序调试 58
第六章 实时分析 76
第七章 I/O 86-CCS outlined in Chapter 1 Chapter II to develop a simple application development 17 Chapter III DSP/BIOS program 32 Chapter IV 41 algorithm and data test program debugging 58 Chapter V Chapter VI Chapter VII of the 76 real-time analysis of I/O 86
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Size: 533504 |
Author: sunshinepwf |
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Description: 自己编写的,采用DSP实现字符叠加的程序,基于合众达SEED-DEC643的扳子,CCS2.2环境,原来的例程是采用FPGA实现字符叠加的,改程序完全采用DSP进行叠加.-I have written using DSP realization of characters superimposed on the procedure, based on the union of the SEED-DEC643 Tatsu wrench, CCS2.2 environment, the original routine are superimposed FPGA realization of characters, changing the procedures to carry out completely the use of DSP superposition.
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Size: 346112 |
Author: 高浩然 |
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Description: 本文是以數位訊號處理器DSP（Digital Singal Processor）之核心架構為主體的數位式溫度控制器開發，而其主要分為硬體電路與軟體程式兩部分來完成。而就硬體電路來看分為量測電路模組、DSP周邊電路及RS232通訊模組、輸出模組三個部分，其中在輸出上可分為電流輸出、電壓輸出以及binary command給加熱驅動裝置, RS232 除了可以與PC聯絡外也可以與具有CPU的熱能驅動器做命令傳輸。在計畫中分析現有工業用加熱驅動裝置和溫度曲線的關係，並瞭解其控制情況。軟體方面即是溫控器之中央處理器程式，亦即DSP控制程式，其中包括控制理論、感測器線性轉換程式、I/O介面及通訊協定相關程式。在控制法則上，提出一個新的加熱體描述模型，然後以前饋控制為主並輔以PID控制，得到不錯的控制結果。-err
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Size: 412672 |
Author: 许珂 |
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