Welcome![Sign In][Sign Up]
Location:
Search - debounce circuit vhdl

Search list

[VHDL-FPGA-VerilogDEBOUNCE

Description: 一个小程序,弹跳消除电路,可消除按健的毛刺干扰-a small procedure, bouncing elimination circuit, according to remove the burr-interference
Platform: | Size: 1024 | Author: 相耀 | Hits:

[VHDL-FPGA-Verilogdebounce

Description: 基于VHDL的键盘去抖动电路 基于VHDL的键盘去抖动电路-VHDL-based keyboard to jitter circuit VHDL-based keyboard to jitter circuit
Platform: | Size: 288768 | Author: 叶金伟 | Hits:

[VHDL-FPGA-Verilogstable_key

Description: 按键消抖电路,包含VHDL编写的程序,以及VerilogHDL编写的程序-Key debounce circuit, including a program written in VHDL, as well as programs written VerilogHDL
Platform: | Size: 627712 | Author: 路政西 | Hits:

[VHDL-FPGA-Verilogvhdl_key_with_debounce

Description: vhdl语言编写的消抖电路,用于按键消抖。-vhdl languages ​ ​ debounce circuit for key debounce.
Platform: | Size: 1024 | Author: | Hits:

[VHDL-FPGA-VerilogDebounce

Description: VHDL编写。在CPLK开发板上设计的数字钟的去抖动电路。该模块相对独立,是学习去抖动的好资料。该模块跟我其它的8个模块配套构成一个数字钟。-Programmed with VHDL.A debouncing circuit which is part of a digital clock designed on a CPLD development board.The module is independent from others and is useful for learning deboucing methods.It is one of my total 9 modules that are used to design a digital clock.
Platform: | Size: 199680 | Author: chzhsen | Hits:

[VHDL-FPGA-Verilogfsmd_debounce_exp

Description: vhdl debounce circuit
Platform: | Size: 1024 | Author: rickdecent | Hits:

[VHDL-FPGA-Verilog按键去抖电路VHDL描述

Description: 在开发板FPGA:Spartan-3E 系列,型号:XC3S500E,封装:FGT320,速度-4,利用Xilinx ISE软件,利用VHDL软件编写按键去抖电路,包含实验说明以及代码实现VHDL.doc文件,UCF管脚绑定文件(In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, write the debounce circuit by using VHDL software, including experimental description and code to achieve the VHDL.doc file, the UCF pin binding file)
Platform: | Size: 29696 | Author: lixilin | Hits:

CodeBus www.codebus.net