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Description: 一个 Free 的 ARM-7 Core,是使用 Verilog 编成,综合后占用资源小,可以执行 uClinux 等程序或系统,内附详细说明的 PDF 档及源码 Verilog 编程等.
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Size: 4433645 |
Author: xyz543 |
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Description: altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码,语言是:verilog 性能不错,不过资源消耗有点大,可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be used to transform learning polynomial algorithm DCT
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Size: 24576 |
Author: 猪猪 |
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Description: 我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
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Size: 27648 |
Author: 于飞 |
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Description: Configurable cpu core that supports Z80, 8080 and gameboy instruction sets
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Size: 41984 |
Author: 吴毅 |
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Description: 全电视信号编码器,verilog的,看看有借鉴价值否?-video signal encoder, Verilog, to see whether the reference value?
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Size: 152576 |
Author: 12 |
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Description: arm verilog hdl ip core-arm Verilog HDL core ip
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Size: 70656 |
Author: lile |
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Description: avr core verilog for asic design
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Size: 83968 |
Author: 杰克 |
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Description: 8051的源代码-8051 source code
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Size: 104448 |
Author: 飞鹰 |
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Description: 8051单片机是一种应用最广泛的单片机.它的内核设计非常精简,这是用Verilog硬件描述语言写的8051单片机内核-8051 is a most widely used SCM. Its kernel design has been streamlined, This is used Verilog hardware description language to write the 8051 microcontroller core
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Size: 52224 |
Author: 王二 |
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Description: 利用verlilog hdl语言编程,完成了8051内核,非常值得学习硬件描述语言的人看看!-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware description language of the people to see!
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Size: 53248 |
Author: 小方 |
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Description: 这里有verilog编写的8051ipcore 谁要啊?-Verilog prepared here has 8051ipcore who ah?
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Size: 53248 |
Author: 韩雪 |
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Description: verilog 描述8051core参考学习用
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Size: 62464 |
Author: 方毛 |
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Description: deinterlace的核心verilog,-deinterlace core verilog,
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Size: 15360 |
Author: zhang chi |
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Description: 8051core-Verilog编写,可修改-8051core-Verilog prepared to modify
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Size: 52224 |
Author: will |
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Description: VERILOG编写的80C51单片机内核程序-Verilog prepared 80C51 single-chip core procedures
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Size: 52224 |
Author: 陈金冲 |
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Description: Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核,对学习verilog语言和以太网有很大帮助。-Ethernet (Ethernet) verilog ip core language used verilogHDL Ethernet soft-core, learning Verilog language and Ethernet are very helpful.
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Size: 903168 |
Author: houlongting |
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Description: VGA核的verilog实现,能用于NIOS2的avalon总线-VGA core Verilog realize, can be used to NIOS2 the avalon bus
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Size: 617472 |
Author: 李永杰 |
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Description: 该文件包含以太网IP核的相关代码,一共包含24个VERILOG源代码-This document contains the relevant Ethernet IP core code, a total of 24 includes Verilog source code
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Size: 69632 |
Author: season |
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Description: 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码,可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
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Size: 740352 |
Author: 打狗队 |
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Description: 以太网10-100M IP核Verilog源码,可综合-Ethernet 10-100M IP core Verilog source code can be integrated
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Size: 740352 |
Author: owen |
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