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[
VHDL-FPGA-Verilog
]
cordicDDS
Description:
Cordic算法实现DDS的Verilog 源码,14位精度，非常实用的。-DDS algorithm Cordic the Verilog source code, 14-bit accuracy, very practical.
Platform:
|
Size:
7168
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Author:
王王
|
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