Description: 基4-FFT蝶形单元实现，按照FPGA内部的乘法器功能编写的-4-FFT butterfly-based unit to achieve, in accordance with the internal FPGA multiplier feature prepared Platform: |
Size: 1024 |
Author:苏菲 |
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Description: VHDL的DCT变换.蝶型算法,很好用的,希望能有帮助-The DCT transform VHDL. Butterfly algorithm, very good with the hope that it can be helpful Platform: |
Size: 1024 |
Author:zhaoyizhi |
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Description: 用FPGA实现的歌曲“梁祝”播放程序，用Verilog HDL编写-FPGA implementation with the song " Butterfly Lovers" player, written with Verilog HDL Platform: |
Size: 312320 |
Author:谭德 |
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Description: 用Verilog语言编写的程序，可以运行在FPGA中，用蜂鸣器产生梁祝的曲调。-Program with the Verilog language, you can run in the FPGA, with a buzzer generating Butterfly tunes. Platform: |
Size: 1024 |
Author:天天 |
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Description: “Randomized Smoothing Networks” introduced the idea of using networks composed of a type of comparator/memory element, initialized to random initial states, to create smoothing networks, which take arbitrary input loads into the network and produce an output that balances the load among all the outputs in a predictable manner. I created a synthesizable Verilog model of these comparator/memory elements (or “balancers”), and used a pseudo-random linear feedback shift register (LFSR) to toggle all possible initial random states for two of the proposed RSNs configurations, the Block network and the Butterfly network, verifying the results of Herlihy and Tirthapura. Platform: |
Size: 247808 |
Author:Stephen Bishop |
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Description: 采用verilog hdl设计的音乐播放器，梁祝，在红色飓风2上测试通过。-Using verilog hdl designed music player, Butterfly in Red Hurricane 2 on the test. Platform: |
Size: 2048 |
Author:xzb |
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