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[VHDL-FPGA-VerilogDEBOUNCE

Description: 一个小程序,弹跳消除电路,可消除按健的毛刺干扰-a small procedure, bouncing elimination circuit, according to remove the burr-interference
Platform: | Size: 1024 | Author: 相耀 | Hits:

[VHDL-FPGA-Verilogdebounce_2_Verilog

Description: 用VerilogHDL编写的按键消抖程序 分频产生100Hz的按键采样时钟,采样时钟周期为10ms, 按键按下后,产生时间为10ms的低电平信号,即LED亮10m-*Project Name :debounce *Module Name :debounce *Target Device :Any Altera FPGA/CPLD Device *Clkin : 50MHz *Desisgner : zhaibin *Date : 2011-11-18 *Version : 2.00 *Descriprion :debounce_VerilogHDL
Platform: | Size: 430080 | Author: ZB | Hits:

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