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[Crack Hack] aes_core

Description: AES高级加密算法的verilog语言实现。同时附有AES协议的pdf文档，和此代码的测试程序，可作为一个IP核直接使用，可减少开发人员的设计时间。-AES Advanced Encryption Algorithm Verilog language. While the agreement with AES pdf documents, and that this code of the test procedure can be used as an IP core direct use, developers can reduce design time.
Platform: | Size: 79788 | Author: 崔崔 | Hits:

[Crack Hack] aes_core

Description: AES高级加密算法的verilog语言实现。同时附有AES协议的pdf文档，和此代码的测试程序，可作为一个IP核直接使用，可减少开发人员的设计时间。-AES Advanced Encryption Algorithm Verilog language. While the agreement with AES pdf documents, and that this code of the test procedure can be used as an IP core direct use, developers can reduce design time.
Platform: | Size: 79872 | Author: | Hits:

[Crack Hack] mini_aes

Description: aes算法的verilog hdl实现，供给大家作为参考 。-Orangk'aes algorithm verilog hdl realized, we supply as a reference.
Platform: | Size: 240640 | Author: 杨忠宇 | Hits:

[Crack Hack] AES_verilog

Description: AES 128bit数据,128bit密钥加解密的verilog语言实现-AES 128bit data, 128bit key encryption and decryption of the verilog language implementation
Platform: | Size: 79872 | Author: 刘蕊丽 | Hits:

[VHDL-FPGA-Verilog] AES256-XILINX10.1

Description: 用XILINX公司提供的NetFPGA板卡并结合软件Xilinx10.1进行系统设计，采用硬件描述语言Verilog实现了 AES-256加密算法。-Provided by XILINX board combined with software Xilinx10.1 NetFPGA system design, using Verilog hardware description language implementation of the AES-256 encryption algorithm.
Platform: | Size: 5120 | Author: yuanying | Hits:

[Crack Hack] aes-verilog-imp

Description: AES加密算法的硬件实现，硬件语言为verilog-AES encryption algorithm hardware implementation, hardware verilog language
Platform: | Size: 6144 | Author: 程家诺 | Hits:

[assembly language] verilog-for-AES-algorithm

Description: 介绍了verilog HDL语言对AES算法进行数据加解密。-Introduced the verilog HDL language to AES algorithm for data encryption and decryption.
Platform: | Size: 77824 | Author: xiaochen | Hits:

[VHDL-FPGA-Verilog] aes

Description: aes加密算法的Verilog语言实现（顶层代码，已编译，无错误）-aes encryption algorithm of Verilog language (top-level code, compile, no error)
Platform: | Size: 5120 | Author: shilei | Hits:

[Other] AES-based-on-FPGA-jiemi

Description: 基于FPGA的AES算法实现，使用verilog语言实现。本模块只包含解密过程，没有加密过程。-Implementation of AES algorithm based on FPGA, using Verilog language. This module contains only the decryption process, no encryption process.
Platform: | Size: 13487104 | Author: 庄德坤 | Hits:

[Crack Hack] tiny_aes_latest.tar

Description: 主要实现使用verilog HDL语言实现AES的加密算法-Main implementation using verilog HDL language implementation of AES encryption algorithm
Platform: | Size: 808960 | Author: 徐晴羽 | Hits:

[Crack Hack] aes_thesis_v1.0

Description: aes code in verilog vhdl language which is very useful.
Platform: | Size: 385024 | Author: sur22 | Hits:

[Other] 基于FPGA的AES256位加密

Description: aes 256位 算法 加密程序，使用verilog 语言(AES 256 bit algorithm encryption program, using Verilog language)
Platform: | Size: 20480 | Author: wrxlln | Hits:

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