Description: Arbiter.v verilog实现
三路请求,使用循环策略的仲裁器
含有看门狗电路-Arbiter.v Verilog achieve three road request, the use of recycled strategy for containing the arbitration watchdog circuit Platform: |
Size: 2048 |
Author:夏虫 |
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Description: IC设计相关,arm内的AMBA桥实现的源码,verilog语言实现,-IC design, arm within the realization of the source AMBA bridge, verilog language, Platform: |
Size: 18432 |
Author:伊路发 |
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Description: amba总线桥:ahb to asb!verilog hdl文档加代码,非常全,soc-amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc Platform: |
Size: 165888 |
Author:zhangyiyun |
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Description: 一个apb总线控制8253的verilog源代码,符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification Platform: |
Size: 107520 |
Author:蔡搏 |
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Description: The
elements come from the necessity of creating generic
modules, in the verification phase, for this widely used
protocol. These primitives are presented as a not
compiled library written in SystemC where interfaces
are the core of the library. The definition of interfaces
instead of generic modules let the user construct
custom modules improving the resources spent during
the verification phase as well as easily adapting his
own modules to the AMBA 3 AXI protocol. As
validation scenario, results obtained for an AXI bus
connecting IDCT and other processing resources for
MPEG4 video decoding are presented. Platform: |
Size: 41984 |
Author:Paul Stephen |
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Description: Verilog code for apb explains the state machine of amba ahb protocol.it is very using full for beginners explain each of the states clearly just download Platform: |
Size: 588 |
Author:ganapathi1231@outlook.com |
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