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[VHDL-FPGA-Verilog] DEMO22

Description: ＶＨＤＬ源程序，ＭＡＸＰＬＵＳ　环境下运行，电梯控制系统-VHDL source code, under Operation Converter, elevator control system
Platform: | Size: 598016 | Author: liu | Hits:

[Other] 12121213

Description: 16层电梯 vhdl模拟代码 非常完整-16-Elevator vhdl very complete simulation code
Platform: | Size: 6144 | Author: md | Hits:

[SCM] Elevator

Description: AVR单片机ATmega16 开发环境ICC 电梯控制模型 (原创) 测试成功-ATmega16 development environment AVR Singlechip ICC elevator control model (original) test successful
Platform: | Size: 4096 | Author: 谢明强 | Hits:

[VHDL-FPGA-Verilog] lift_VHDLDocument

Description: 用VHDL描述的电梯运行程序，代码注释很详细，希望对大家有帮助-VHDL description of the elevator used to run programs, code comment in great detail, I hope all of you help
Platform: | Size: 162816 | Author: ninghuiming | Hits:

[Graph program] lift

Description:
Platform: | Size: 8192 | Author: qlz | Hits:

[VHDL-FPGA-Verilog] EDAdeisgn(2)

Description: 该文件中是关于一些VHDL许多编程实例以及源码分析，希望对VHDL爱好者有用。卷2实例包括：多路彩灯控制器的设计与分析、智力抢器的设计与分析、微波炉控制器、数据采集控制系统、电梯控制器的设计与分析-The document is on a number of VHDL source code in many programming examples and analysis, in the hope that useful VHDL enthusiasts. Volume 2 Examples include: multi-way lantern controller design and analysis, intelligence steal the design and analysis, microwave oven controller, data acquisition and control systems, elevator controller design and analysis
Platform: | Size: 4952064 | Author: shengm1 | Hits:

[VHDL-FPGA-Verilog] lift

Description: 采用vhdl语言的电梯控制器源代码，能够实现报警，等待，并采用了标准的最优电梯运动路线。-Using VHDL language elevator controller source code, to realize the police, waiting, and the optimal use of the standard line of lift movement.
Platform: | Size: 2048 | Author: wriuwru | Hits:

[VHDL-FPGA-Verilog] lift_code_verilog

Description: 实现一个4层楼的单电梯控制系统。门可以自动开关也可以手动开关。代码可综合，无多驱动现象。-Realize a 4-story single-elevator control system. Door can automatically switch can also manually switch. Code can be integrated, no more than drive the phenomenon.
Platform: | Size: 3072 | Author: 幻婳 | Hits:

[VHDL-FPGA-Verilog] dianti

Description: vhdl代码： 电梯控制器程序设计与仿真！初学fpga者可以参考参考！！比较简单-VHDL code: Elevator controller design and simulation program! FPGA beginner who can refer to reference! ! Relatively simple
Platform: | Size: 162816 | Author: daxiadian2 | Hits:

[VHDL-FPGA-Verilog] ff

Description: QUARTUS II平台上的基于VHDL语言的电梯系统控制程序。-QUARTUS II platform based on the VHDL language elevator system control procedures.
Platform: | Size: 259072 | Author: 凌丽 | Hits:

[File Format] vhdl

Description: 电梯控制器的模块电路，其中一个很重要的模块，是txt格式的代码-Elevator controller module circuit, which is a very important module is the code txt format
Platform: | Size: 1024 | Author: yang | Hits:

[VHDL-FPGA-Verilog] vhdl2

Description: 电梯控制器程序设计与仿真的vhdl源代码-Elevator controller design and simulation of vhdl source code
Platform: | Size: 162816 | Author: 胡爱军 | Hits:

[VHDL-FPGA-Verilog] lift

Description: （1）用VHDL实现四层电梯运行控制器。 （2）电梯运行锁用一按钮代替（开锁上电），低电平可以运行，高电平不能运行。 （3）每层电梯入口处设有上行、下行请求按钮，电梯内设有乘客到达层次的停站要求开关，高电平有效。 （4）有电梯所处楼层指示灯和电梯上行、下行状态指示灯。 （5）电梯到达某一层时，该层指示灯亮，并一直保持到电梯到达另一层为止。电梯上行或下行时，相应状态指示灯亮。 （6）电梯接收到停站请求后，每层运行2秒，到达停站层，停留2秒后门自动打开，开门指示灯亮，开门6秒后电梯自动关门。 （7）能记忆电梯内、外的请求信号，并按照电梯的运行规则依次响应，请求信号保留至响应后撤除。 （8）人数超载或超重用一按钮代替，高电平有效，超载时电梯不能运行，并有相应指示。 （9）事故报警按钮高电平有效，事故报警不能运行，并有指示灯，信号保留至事故消除 -(1) the realization of four-storey elevator with VHDL controller operation. (2) elevator button with a lock to run in place of (unlock power), low run, can not run high. (3) on each floor with elevator at the entrance to the uplink, downlink request button, which are equipped with passenger elevators to reach the level of the requirements of stoppings switch, high effective. (4) elevators and escalators which lights up the floor, down the state indicator. (5) elevator to reach a certain level, the level indicator light, and has remained until the elevator arrived at another level. Elevator uplink or downlink, the corresponding status indicator light. (6) Elevator stops receiving a request, each running two seconds to reach the stops layer, two seconds back door stay open automatically, open the door indicator light, 6 seconds after the elevator door closed automatically. (7) to memory elevator inside and outside the request signal, and in accordance with the rules followed
Platform: | Size: 289792 | Author: 管皮皮 | Hits:

[VHDL-FPGA-Verilog] lift.vhd

Description: 用VHDL实现了电梯的模拟程序，实现了自动判断楼层，然后根据客户需求和楼层最近原则，实现自动判断上下行，还有报警，强制开门等功能-Achieved using VHDL elevator simulation program, to determine the realization of an automatic floor, and then based on the principle of demand and the floor recently, automatically determine the next line, as well as alarm, forced open the door and other features ~ ~
Platform: | Size: 1024 | Author: 董灏 | Hits:

[VHDL-FPGA-Verilog] Vhdl1

Description: Top Level VHDL Code -- simulate the relatively slow progress of an elevator car by dividing the -- clock down by an outrageously high number and scanning the car registers for -- an elevator s next -- (normally the signals used below would be IO pins on the chip, but we have -- no physical elevator, so this is a kind of "diagnostic mode")-Top Level VHDL Code -- simulate the relatively slow progress of an elevator car by dividing the -- clock down by an outrageously high number and scanning the car registers for -- an elevator s next -- (normally the signals used below would be IO pins on the chip, but we have -- no physical elevator, so this is a kind of "diagnostic mode")
Platform: | Size: 3072 | Author: Victor | Hits:

[Software Engineering] VHDL_fire_alarm_detection

Description: vhdl source code of fire detection system/fire alarm system especially for high rise building? This among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .-vhdl source code of fire detection system/fire alarm system especially for high rise building? This is among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .
Platform: | Size: 1024 | Author: subin | Hits:

[VHDL-FPGA-Verilog] VHDL-dianti

Description: 高楼电梯自动控制系统(Windows平台上运行的ispLEVER编程软件。 ): 1统控制的电梯往返于1-9层楼。 2客要去的楼层数可手动输入并显示（设为A数）。 3梯运行的楼层数可自动显示（设为B数）。 4A>B时，系统能输出使三相电机正转的时序信号，使电梯上升； 当A<B时，系统能输出使三相电机反转的时序信号，使电梯下降； 当A=B时，系统能输出使三相电机停机的信号，使电梯停止运行并开门； 5是上升还是下降各层电梯门外应有指示，各层电梯门外应有使电梯上升或下降到乘客所在楼层的控制开关。 注：此为word文档，但里面有源代码。-High-rise elevator control system (Windows platform programming software running on the ispLEVER. ): An elevator control system and from 1-9 floors. 2, the number of passengers going to the floor can manually enter and display (Make A number). 3 ladder run automatically display the number of floors (Set B number). 4A> B, the system can output three-phase motor is transferred to the timing signal to lift up When A <B, the system can output three-phase motor to reverse the timing signal to the lift down When A = B, the system can output a signal to shut down three-phase motor, so that the lift stops and open the door 5 is increasing or decreasing the lift on each floor outside the door should be directed, due to lift on each floor outside the elevator up or down to the floor where the passenger control switch. Note: This is a word document, but inside the source code.
Platform: | Size: 34816 | Author: | Hits:

[VHDL-FPGA-Verilog] Elevator

Description: Simple vhdl code for elevator
Platform: | Size: 9216 | Author: Sam | Hits:

[VHDL-FPGA-Verilog] 1

Description: VHDL代码，一些课本的小程序。包含3线-8线译码器，4选1选择器，6层电梯，8线-3线编码器，8线-3线优先编码器，8选1，BCD-7段显示译码器真值表，半加器，摩尔状态机，数字频率计，数字时钟，序列检测器的设计，一般状态机等等。(VHDL code, some textbooks for small programs. Includes 3 -8 decoder, 4 1 selector, 6 elevator, line 8 Line 8 line -3 encoder, -3 priority encoder, 8 choose 1, BCD-7 segment display decoder truth table, half adder, Moore state machine, digital frequency meter, digital clock, sequence detector design, general state machine etc..)
Platform: | Size: 453632 | Author: zidting | Hits:

[VHDL-FPGA-Verilog] 2

Description: VHDL代码，一些课本的小程序。包含3线-8线译码器，4选1选择器，6层电梯，8线-3线编码器，8线-3线优先编码器，8选1，BCD-7段显示译码器真值表，半加器，摩尔状态机，数字时钟，序列检测器的设计，一般状态机等等。(VHDL code, some textbooks for small programs. It includes 3 line -8 line decoder, 4 selector 1 selector, 6 elevator, 8 line -3 encoder, 8 line -3 line priority encoder, 8 select 1, BCD-7 segment display decoder truth table, half adder, Moore state machine, digital clock, sequence detector design, general state machine and so on.)
Platform: | Size: 454656 | Author: zidting | Hits:
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