Search - Spartan-3E A

[VHDL-FPGA-Verilog] verilog实现ALU的源代码

Description: verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
Platform: | Size: 1024 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] spartan II

Description: spartanII 是xilinx公司提供的一款高性能FGPA芯片,本文详细介绍spartanII的体系结构和编程!-spartanII Xilinx is provided by a high-performance chip FGPA, spartanII This paper describes the architecture and programming!
Platform: | Size: 328704 | Author: 唐健隆 | Hits:

[Embeded-SCM Develop] 8051forxilinx

Description: 我在spartan-3e starter kit 的板上实现了mc8051，程序调试通过，运行正常。方法 1、用Keil 编译8051的代码； 2、将生成的hex文件用hex->bin工具转成bin文件 3、用bin－>coe工具转成coe 4、在core generate 生成的rom中指明coe文件的位置 5、编译、下载到spartan-3e starter kit 板上，你将会看到流水灯的效果我正在做这方面的东西，欢迎大家与我一起探讨。-I spartan- 3e of the starter kit board realized mc8051. through debugging procedures, operating normally. A method of using the Keil compiler code 8051; 2, will produce the documents hex hex-
Platform: | Size: 608256 | Author: lanty | Hits:

[Other] lab1mb

Description: 简单的硬件设计实验，此试验可作为使用 Xilinx Platform Studio (XPS)创建简单系统的指导，此试验以 Spartan-3E为目标板。-Simple hardware design of experiments, this test can be used as the use of Xilinx Platform Studio (XPS) to create a simple guidance system, this experiment with Spartan-3E for the target board.
Platform: | Size: 2063360 | Author: jie | Hits:

[USB develop] CY7C68013-A

Description: usb 的开发文档，非常有参考价值详细讲述了CY7C68013的开发过程-usb development documents, a very valuable reference for a detailed account of the development process CY7C68013
Platform: | Size: 1555456 | Author: 孙译 | Hits:

[VHDL-FPGA-Verilog] FPGA_SPI_FLASH

Description: 本应用指南讲述 Spartan-3E 系列中的串行外设接口 (SPI) 配置模式。SPI 配置模式拓宽了 SpartanTM-3E 设计人员可以使用的配置解决方案。SPI Flash 存储器件引脚少、封装外形小而且货源广泛。本指南讨论用 SPI Flash 存储器件配置 Spartan-3E FPGA 所需的连接，并且介绍 SPI 模式的配置流程。本指南还提供一种实用工具，用于在原型开发过程中对选定的 STMicroelectronics 和 Atmel SPI 器件进行在系统编程。-Application Guide on the Spartan-3E series of serial peripheral interface (SPI) configuration mode. SPI configuration mode broadened SpartanTM-3E designers can use to configure the solution. SPI Flash memory-pin small package and supply a wide range of small form factor. Discussed in this Guide SPI Flash memory with Spartan-3E FPGA configuration required to connect, and introduced the SPI mode configuration process. This guide also provides a practical tool for the prototype development process in selected STMicroelectronics and Atmel SPI programmable devices in the system.
Platform: | Size: 371712 | Author: xth | Hits:

[VHDL-FPGA-Verilog] P2S

Description: This file is used to transfer p2s data in a Spartan 3e
Platform: | Size: 361472 | Author: carlos | Hits:

[VHDL-FPGA-Verilog] Fingerprint_Identify

Description: 本项目名称是：基于FPGA的指纹识别模块设计。主要内容为：本模块采用xilinx公司的Spartan 3E系列XC3S500E 型FPGA作为核心控制芯片，通过富士通公司的MFS300滑动式电容指纹传感器对指纹图象进行提取，然后对提取的指纹图像进行灰度滤波、图像增强、二值化、二值去噪、细化等预处理，得到清晰的指纹图象，再从清晰的指纹图象中提取指纹特征点，存入外部FLASH作为建档模板。指纹比对时，采用同样的方法获得清晰的指纹图像，建立比对模板，然后将比对模板与建档模板利用点模式匹配算法进行比对，得出比对结果。该模块利用嵌入式软核实现系统的管理，利用硬件实现指纹识别，保证了系统功能的完整性与识别的正确性。该识别模块可用于门禁、考勤、安检、保险箱柜等很多方面，也可和计算机等设备联机使用，满足各个方面的不同需求，因此它的设计具有很广泛的应用前景和市场价值。 -The project name is: FPGA-based fingerprint identification module design. The main contents are: the use of this module xilinx s Spartan 3E Series XC3S500E FPGA-based control chip as the core, through the MFS300 Fujitsu fingerprint slide sensor capacitance extraction of the fingerprint image, and then extracted gray-scale fingerprint image filtering, image enhancement, binarization, denoising Second, refinement, etc. pre-treatment have been given clear fingerprint image, and then a clear fingerprint image from the extracted fingerprint feature points, into the external FLASH file as a template. Fingerprint matching using the same method to obtain a clear image of the fingerprint to establish than the template, and then will be the template file templates and the use of point pattern matching algorithm than the right, than the results obtained. The module is the realization of the use of soft-core embedded system management, the use of fingerprint recognition hardware implementation
Platform: | Size: 191488 | Author: xiaoxu | Hits:

[VHDL-FPGA-Verilog] Spartan-3_NeuralNetwork_3-layer_feedforward_backp

Description: The aim of this project is the design and implementation of a system simulating a NN in the Spartan-3 Starter Board of Xilinx. The NN will be a 3-layer feedforward backpropagation.- The aim of this project is the design and implementation of a system simulating a NN in the Spartan-3 Starter Board of Xilinx. The NN will be a 3-layer feedforward backpropagation.
Platform: | Size: 1479680 | Author: duzos | Hits:

[VHDL-FPGA-Verilog] DDS

Description: A simple VHDL implementation of a DDS on Xilinx Spartan 3E Starter Kit development board
Platform: | Size: 107520 | Author: Iepu | Hits:

[Other] Simple_LCD

Description: 简单的Spartan 3e 上面的LCD控制程序-A simple Spartan 3e above LCD control procedures
Platform: | Size: 5120 | Author: zhanchi | Hits:

[VHDL-FPGA-Verilog] fpga-dm9000a

Description: 一个项目工程，硬件包含XINLINX FPGA，配置FLASH，串口，SDRAM,与以太网芯片DM9000A，实现数据采集，以太网传输，电路验证完全正确，请放心使用，SPARTAN 3E 的BGA引脚320个，不容易布板，可以参考使用的。要FPGA实现网络通信也可以参考电路，B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SDRAM, and Ethernet chips DM9000A, data acquisition, Ethernet transmission, circuit verification is completely correct, please rest assured that the use of, SPARTAN 3E' s 320-pin BGA it is not easy layout, you can reference to use. To achieve network communication FPGA also can refer to the circuit, because the product upgrades so publicly.
Platform: | Size: 915456 | Author: rong | Hits:

[VHDL-FPGA-Verilog] vga_control

Description: this a spartan 3E base project file. this is the project of game in which vga is interfaced to FPGA. this file is main file in which vga timing is maintained.-this is a spartan 3E base project file. this is the project of game in which vga is interfaced to FPGA. this file is main file in which vga timing is maintained.
Platform: | Size: 1024 | Author: yasir | Hits:

[Software Engineering] VHDL_fire_alarm_detection

Description: vhdl source code of fire detection system/fire alarm system especially for high rise building? This among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .-vhdl source code of fire detection system/fire alarm system especially for high rise building? This is among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .
Platform: | Size: 1024 | Author: subin | Hits:

[VHDL-FPGA-Verilog] Lab_4_PicoBlaze

Description: Integrating a picoblaze processor in LabVIEW FPGA by use of CLIP node. Create LabVIEW FPGA Project for Xilinx Spartan 3E starter board. use pBlazIDE to program a psm file that will run on the picoblaze softcore processor.
Platform: | Size: 1750016 | Author: gaansan | Hits:

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