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[MPISPI-PRT

Description: 昨天在论坛上看到有人帖出了他写的并串转换VHDL代码,但是他自己说有问题,但是不知道怎么改。我大概看了一下,发现思路还是比较乱的。于是就写下了我自己的并串转换代码。-yesterday at the forum see someone points out his writing and string conversion VHDL code, But he said there are problems, but does not know how reform. I probably watched and found ideas is quite a mess. So I wrote on their own code and string conversion.
Platform: | Size: 1024 | Author: ZHAOBOO | Hits:

[VHDL-FPGA-VerilogCUS_SPI-VHDL

Description: 此为VHDL的SPI通信代码,全部在一个压缩包中,请仔细阅读后再使用.-this as VHDL code SPI communication, all in a compressed package, please read carefully before use.
Platform: | Size: 4096 | Author: 藏瑞 | Hits:

[VHDL-FPGA-Verilogspi

Description: VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the
Platform: | Size: 65536 | Author: 阿飞 | Hits:

[SCMSPI

Description: // This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // slave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:
Platform: | Size: 72704 | Author: 蓝天 | Hits:

[VHDL-FPGA-VerilogSPI_collect

Description: 有关SPI的vhdl实现。包括SPI官方协议,几篇开发时用到的论文,附加了中文注释的SPI IPcore,还有一个经过简化的master mode的SPI实现的vhdl代码-Related to the VHDL SPI realize. Including SPI official agreement, when used to develop several theses, Chinese notes attached SPI IPcore, there is a simplified master mode the SPI realize the VHDL code
Platform: | Size: 1334272 | Author: danielmu | Hits:

[VHDL-FPGA-VerilogPicoBlaze_amp_adc

Description: PicoBlaze 处理器放大器和 A/D 转换器控制器 展示了 Linear Technology LTC6912-1 可编程增益放大器和 Linear Technology LTC1407A 模数(A/D)转换器的基本操作。 结果如字符 LCD 屏幕所示。 利用 PicoBlaze 处理器控制器与放大器、A/D 转换器和 LCD 屏幕进行基于 SPI 的通信。-PicoBlaze processor amplifier and A/D converter controller demonstrated the Linear Technology LTC6912-1 programmable gain amplifiers, and Linear Technology LTC1407A modulus (A/D) converter basic operation. The result was as shown in character LCD screen. Use PicoBlaze processor controller and amplifier, A/D converter and SPI-based LCD screen communication.
Platform: | Size: 1906688 | Author: andy qe | Hits:

[Embeded-SCM Developsd+spi

Description: sd 的spi模式详细的中文资料,一位好心人翻译的-sd of the spi mode in detail the information the Chinese, a translation of well-wishers
Platform: | Size: 1821696 | Author: 黄天乐 | Hits:

[VHDL-FPGA-Verilogspi

Description: 一篇比较好的spi接口的vhdl实现的参考-A relatively good spi interface realize VHDL reference
Platform: | Size: 18432 | Author: 杨子树 | Hits:

[Embeded-SCM DevelopPicoBlazeSPIFlash

Description: PicoBlaze 处理器 SPI Flash 编程器的详细资料,可用作XILINX开发板的参考资料。-PicoBlaze processor SPI Flash programmer detailed information XILINX development board can be used as a reference.
Platform: | Size: 673792 | Author: cgc | Hits:

[VHDL-FPGA-VerilogVHDL-SPI-Module.doc

Description: 本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数,由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmitted over the median, given by an external controller to control transmission pulse.
Platform: | Size: 37888 | Author: | Hits:

[VHDL-FPGA-VerilogSPI-Collect

Description: 一个spi串口 希望大家能用上 -Spi serial a hope that we can use on
Platform: | Size: 1334272 | Author: hehe520 | Hits:

[source in ebookxapp348

Description: spi源码,是verliog的,有需要的可依参考进行设计自己的工程,后续有需要还有一个使用说明附上-spi-source is the verliog, reference may need to design their own projects, there is a need to have a follow-up instructions attached
Platform: | Size: 852992 | Author: lee | Hits:

[VHDL-FPGA-VerilogSPIsend

Description: Verilog HDL的程式,上網找到SPI程式, vspi.v這程式相當好用可用來接收與傳送SPI,並且寫了一個傳輸信號測試,spidatasent.v這程式就是傳送的資料,分別為00 66... 01 77...... 02 55這樣的資料,並透過MAX+PULS II軟體進行模擬,而最外層的程式是test_createspi.v!-Verilog HDL programs, Internet find SPI program, vspi.v this very useful program can be used to receive and send SPI, and wrote a transmission signal test, spidatasent.v this program is to send the information, namely, 00 66 ... 01 77 ...... 02 55 This information, and through the MAX+ PULS II software simulation, while the outermost layer of the program are test_createspi.v!
Platform: | Size: 145408 | Author: Rick | Hits:

[VHDL-FPGA-Verilog61EDA_D954

Description: 用FPGA实现的ADC采样器,用vhdl编写,spi总线-FPGA implementation using the ADC sampler, prepared using VHDL, spi bus
Platform: | Size: 58368 | Author: nbm | Hits:

[SCMspi

Description: 三线spi接口,用verilog实现,作为一个模块,可以接收并行数据,然后串行发送-Three Line spi interface, using Verilog implementation, as a module, can receive parallel data, and then send the serial
Platform: | Size: 1024 | Author: 郭文豹 | Hits:

[Embeded-SCM Developspicore

Description: 基于FPGA的SPI控制器.doc,包括FPGA实现地源代码和协议的基本介绍--FPGA-based SPI controller. Doc, including the FPGA to achieve an agreement to source code and a basic introduction
Platform: | Size: 7168 | Author: ss | Hits:

[Embeded-SCM DevelopSPI

Description: SPI,是英语Serial Peripheral interface的缩写,顾名思义就是串行外围设备接口。-SPI, is the English acronym for Serial Peripheral interface, as its name suggests is a serial interface peripherals.
Platform: | Size: 4096 | Author: 司令 | Hits:

[Otherspi.tar

Description: This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
Platform: | Size: 1024 | Author: johnl | Hits:

[Embeded-SCM Developspi

Description: 此程序是一个完整的项目工程,包括c-c++程序和VHDL程序 -This procedure is a complete project, including the c-c++ program and VHDL procedures
Platform: | Size: 17528832 | Author: pxlj | Hits:

[Parallel Portspi

Description: SPI的两个程序,一个收,一个发,完整的工程-SPI' s two programs, an income, a hair
Platform: | Size: 5120 | Author: jolly | Hits:
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