Search - SPI PROTOCOL in verilog

[VHDL-FPGA-Verilog] SPIsend

Description: Verilog HDL的程式，上網找到SPI程式， vspi.v這程式相當好用可用來接收與傳送SPI，並且寫了一個傳輸信號測試，spidatasent.v這程式就是傳送的資料，分別為00 66... 01 77...... 02 55這樣的資料，並透過MAX+PULS II軟體進行模擬，而最外層的程式是test_createspi.v！-Verilog HDL programs, Internet find SPI program, vspi.v this very useful program can be used to receive and send SPI, and wrote a transmission signal test, spidatasent.v this program is to send the information, namely, 00 66 ... 01 77 ...... 02 55 This information, and through the MAX+ PULS II software simulation, while the outermost layer of the program are test_createspi.v!
Platform: | Size: 145408 | Author: Rick | Hits:

[VHDL-FPGA-Verilog] SPI_Core.ZIP

Description: SPI协议的VHDL/Verilog语言实现。-SPI agreement VHDL/Verilog language.
Platform: | Size: 13312 | Author: qjyong | Hits:

[VHDL-FPGA-Verilog] spi

Description: spi协议用verilog 编写可以在xilinx fpga板子上 ise软件-spi protocol written in verilog in xilinx fpga board ise software
Platform: | Size: 1024 | Author: Andy | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[VHDL-FPGA-Verilog] SPIsend

[VHDL-FPGA-Verilog] SPI_Core.ZIP

[VHDL-FPGA-Verilog] spi

CodeBus www.codebus.net