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[VHDL-FPGA-VerilogRECURSIVEALGORITHMFOREFFICIENTMAPDECODING

Description: Early termination enables powering down parts of the soft-input soft-output (SISO) equalizer and decoder thereby saving power.
Platform: | Size: 104448 | Author: suresh | Hits:

[3G developPCCCs-in-an-AWGN-channel-

Description: VS2010及IT++4.2下实现PCCC在AWGN信道上的仿真-This program simulates Parallel Concatenated Convolutional Codes (PCCCs) of coding rate 1/3 using a turbo decoder with two SISO RSC modules. Reference: S. Benedetto, D. Divsalar, G. Motorsi and F. Pollara, "A Soft-Input Soft-Output Maximum A posteriori (MAP) Module to Decode Parallel and Serial Concatenated Codes", TDA Progress Report, nov. 1996
Platform: | Size: 2048 | Author: raven | Hits:

[3G developSCCCs-in-an-AWGN-channel-

Description: VS2010及IT++4.2下实现SCCC在AWGN信道上的仿真-This program simulates Serially Concatenated Convolutional Codes (SCCCs) of coding rate 1/4 using a turbo decoder with a SISO NSC module and a SISO RSC module. Reference: S. Benedetto, D. Divsalar, G. Motorsi and F. Pollara, "A Soft-Input Soft-Output Maximum A posteriori (MAP) Module to Decode Parallel and Serial Concatenated Codes", TDA Progress Report, nov. 1996
Platform: | Size: 2048 | Author: raven | Hits:

[Communication-Mobileturbo_matlabdemo_examp

Description: Turbo 码的matlab程序。它巧妙地将两个简单分量码通过伪随机交织器并行级联来构造具有伪随机特性的长码,并通过在两个软入/软出(SISO)译码器之间进行多次迭代实现了伪随机译码。他的性能远远超过了其他的编码方式,得到了广泛的关注和发展,并对当今的编码理论和研究方法产生了深远的影响,信道编码学也随之进入了一个新的阶段 -Turbo code matlab program. It skilfully two simple component codes through pseudo-random interleaver parallel concatenated to construct the long code of a pseudo-random characteristics, and through multiple iterations between the two soft in/soft-output (SISO) decoder a pseudo-random decoding. His performance than other encoding, and get a lot of attention and development, and today' s coding theory and research methods had a profound impact, channel coding theory also entered a new phase
Platform: | Size: 60416 | Author: 石大 | Hits:

[Program doc01316017

Description: investigating the performances and complexities of the various SISO algorithms. a turbo decoder with the selected SISO algorithm is designed and implemented using VHDL as design entry and simulation language
Platform: | Size: 239616 | Author: Gokhan | Hits:

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