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[Other resourcers_decoder_31_19_6.tar

Description: Hard-decision decoding scheme Codeword length (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents 5 bit. Uses GF(2^5) with primitive polynomial p(x) = X^5 X^2 + 1 Generator polynomial, g(x) = a^15 a^21*X + a^6*X^2 + a^15*X^3 + a^25*X^4 + a^17*X^5 + a^18*X^6 + a^30*X^7 + a^20*X^8 + a^23*X^9 + a^27*X^10 + a^24*X^11 + X^12. Note: a = alpha, primitive element in GF(2^5) and a^i is root of g(x) for i = 19, 20, ..., 30. Uses Verilog description with synthesizable RTL modelling. Consists of 5 main blocks: SC (Syndrome Computation), KES (Key Equation Solver), CSEE (Chien Search and Error Evaluator), Controller and FIFO Register. -Hard-decision decoding scheme Codeword l KV (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents five bit. Uses GF (2 ^ 5) with primitive polynomial p (x) = x ^ x ^ 5 2 1 Ge nerator polynomial. g (x) = a ^ a ^ 15 * 21 ^ 6 a X * X ^ a ^ 15 2 * X ^ a ^ 3 25 * X ^ a ^ 4 17 5 * X ^ a ^ 18 ^ 6 X * a * X 30 ^ 7 ^ a ^ 20 * X ^ a ^ 23 8 * X ^ a ^ 9 * 27 X 10 ^ a ^ 24 * 11 ^ X ^ X 12. Note : a = alpha, primitive element in GF (2 ^ 5) and a ^ i is the root of g (x) for i = 19, 20, ..., 30. Uses Verilog description with synthesizab le RTL modeling. Consists of five main blocks : SC (Syndrome Computation), KES (Key Equation Solver). CSEE (Chien Search and Error Evaluator) Controller and FIFO Register.
Platform: | Size: 14247 | Author: 孟轲敏 | Hits:

[VHDL-FPGA-Verilogrs_decoder_31_19_6.tar

Description: Hard-decision decoding scheme Codeword length (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents 5 bit. Uses GF(2^5) with primitive polynomial p(x) = X^5 X^2 + 1 Generator polynomial, g(x) = a^15 a^21*X + a^6*X^2 + a^15*X^3 + a^25*X^4 + a^17*X^5 + a^18*X^6 + a^30*X^7 + a^20*X^8 + a^23*X^9 + a^27*X^10 + a^24*X^11 + X^12. Note: a = alpha, primitive element in GF(2^5) and a^i is root of g(x) for i = 19, 20, ..., 30. Uses Verilog description with synthesizable RTL modelling. Consists of 5 main blocks: SC (Syndrome Computation), KES (Key Equation Solver), CSEE (Chien Search and Error Evaluator), Controller and FIFO Register. -Hard-decision decoding scheme Codeword l KV (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents five bit. Uses GF (2 ^ 5) with primitive polynomial p (x) = x ^ x ^ 5 2 1 Ge nerator polynomial. g (x) = a ^ a ^ 15* 21 ^ 6 a X* X ^ a ^ 15 2* X ^ a ^ 3 25* X ^ a ^ 4 17 5* X ^ a ^ 18 ^ 6 X* a* X 30 ^ 7 ^ a ^ 20* X ^ a ^ 23 8* X ^ a ^ 9* 27 X 10 ^ a ^ 24* 11 ^ X ^ X 12. Note : a = alpha, primitive element in GF (2 ^ 5) and a ^ i is the root of g (x) for i = 19, 20, ..., 30. Uses Verilog description with synthesizab le RTL modeling. Consists of five main blocks : SC (Syndrome Computation), KES (Key Equation Solver). CSEE (Chien Search and Error Evaluator) Controller and FIFO Register.
Platform: | Size: 14336 | Author: 许茹芸 | Hits:

[Other15.M.Sc.CommunicationStudies

Description: 15. M.Sc. Communication Studies.pdf-15. M.Sc. Communication Studies.pdf
Platform: | Size: 179200 | Author: david | Hits:

[GPS developSC-1513_datasheet_v1.4

Description: GPS SC-1513 datasheet
Platform: | Size: 463872 | Author: cyberworm | Hits:

[Crack HackunPESpin03

Description: Décrypteur pour PeSpin 0.3 par BeatriX unPESpin 0.3 Release 1 lundi 15 novembre 2004 - 11 h 32 Merci à Cyberbob pour avoir codé PESpin 0.3 - je me suis vraiment beaucoup amusé dessus :) Merci à : Kaine - Cyber DAEMON - R!sc - Gbillou - Thierry The One pour leur soutien, leurs conseils, leur intérêt porté sur ce projet et leurs aides techniques . Cette version ne prend pas en compte l option " protection par mot de passe "- Décrypteur pour PeSpin 0.3 par BeatriX unPESpin 0.3 Release 1 lundi 15 novembre 2004- 11 h 32 Merci à Cyberbob pour avoir codé PESpin 0.3- je me suis vraiment beaucoup amusé dessus :) Merci à : Kaine- Cyber DAEMON- R!sc- Gbillou- Thierry The One pour leur soutien, leurs conseils, leur intérêt porté sur ce projet et leurs aides techniques . Cette version ne prend pas en compte l option " protection par mot de passe "
Platform: | Size: 10240 | Author: ultrain | Hits:

[LabViewUSB-LABVIEW

Description: The SC-2075 is a desktop signal conditioner that you can connect directly to National Instruments E Series or 1200 Series devices. The SC-2075 has the following features: • Binding posts – Three for ±15 V outputs – Two for 0 to 5 V outputs – Two for measuring analog signals or DC voltages • BNC connectors – Two for analog inputs – Two for analog outputs – One for triggering • Spring terminals – Eleven for analog inputs – Seven for analog controls – Seven for counter controls – Two for TTL-level power and ground signals – Eight for digital input/output (DIO) signals-The SC-2075 is a desktop signal conditioner that you can connect directly to National Instruments E Series or 1200 Series devices. The SC-2075 has the following features: • Binding posts – Three for ±15 V outputs – Two for 0 to 5 V outputs – Two for measuring analog signals or DC voltages • BNC connectors – Two for analog inputs – Two for analog outputs – One for triggering • Spring terminals – Eleven for analog inputs – Seven for analog controls – Seven for counter controls – Two for TTL-level power and ground signals – Eight for digital input/output (DIO) signals
Platform: | Size: 39936 | Author: MHUSSIEN | Hits:

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