Search - PWM waveform generator VHDL

[VHDL-FPGA-Verilog] PWMVHDL

Description: 电机控制中PWM波产生的程序，VHDL语言实现-Motor Control PWM wave generated by the procedure, VHDL language
Platform: | Size: 166912 | Author: wg | Hits:

[VHDL-FPGA-Verilog] FPGAdezizhixingSPWMboChengXu

Description: 基于FPGA的自治型SPWM波形发生器的设计！正弦脉宽调制（SPWM）技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用，如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈！-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!
Platform: | Size: 4096 | Author: 小喻 | Hits:

[VHDL-FPGA-Verilog] moter

Description: VHDL写的PWM发生器，仿真通过，波形基本完美，可以用于直流电机的控制-PWM generator written in VHDL, simulation is passed, the basic waveform perfect, can be used for DC motor control
Platform: | Size: 897024 | Author: dansen | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: PWM控制就是产生一定周期，占空比不同的方波信号，当占空比较大时，电机转速较高，否则电机转速较低。当采用FPGA产生PWM波形时，只需FPGA内部资源就可以实现，数字比较器的一端接设定值输出，另一端接线性递增计数器输出。当线性计数器的计数值小于设定值时输出低电平，当计数器大于设定值时输出高电平，这样就可通过改变设定值，产生占空比不同的方波信号，从而达到控制直流电机转速的目的。直流电机控制电路主要由2部分组成，如图1所示：  FPGA中PWM脉宽调制信号产生电路；  FPGA中正/反转方向控制电路 -PWM control is a certain cycle, a different duty cycle square wave signal, when the duty cycle is high, higher motor speed, or lower motor speed. When the PWM waveform generated using FPGA, the FPGA internal resources only can be achieved, the figure one comparator output termination setting, the other linear incremental counter output termination. When the value of linear counter output is less than low-level settings, when the counter output is greater than high settings, so that by changing the settings can produce different duty cycle square wave signal, DC motor control to achieve the purpose of speed. DC motor control circuit mainly by 2 parts, as shown in Figure 1:  FPGA in the PWM pulse width modulation signal generator circuit Chiang Kai-shek  FPGA/reverse direction control circuit
Platform: | Size: 37888 | Author: 袁玉佳 | Hits:

[VHDL-FPGA-Verilog] pwm

Description: 运用FPGA 产生pwm脉宽调制信号的源代码-use fpga generate pwm signal
Platform: | Size: 2425856 | Author: 任彩虹 | Hits:

[VHDL-FPGA-Verilog] pwm

Description: PWM脉冲产生代码，程序采用VHDL硬件描述语言！很有参考价值-PWM pulse generation code, the program using VHDL hardware description language! Useful reference
Platform: | Size: 76800 | Author: 周涛 | Hits:

[VHDL-FPGA-Verilog] EXP5_PWM_GENERATOR

Description: 用FPGA设计的一种pwm波形生成器，语言为VHDL-FPGA design a pwm waveform generator, language VHDL
Platform: | Size: 2037760 | Author: liuxing | Hits:

[VHDL-FPGA-Verilog] VHDL-book3

Description: D_flipflop：1位D触发器的设计 D_fllipflop_behav：4位D触发器的设计 reg1bit：1位寄存器设计 reg4bit：4位寄存器设计 shiftreg4：一般移位寄存器的设计 ring_shiftreg4：环型移位寄存器的设计 debounce4：消抖电路的设计 clock_pulse：时钟脉冲电路的设计 count3bit_gate：3位计数器的设计 count3bit_behav：3位计数器的设计 mod5cnt：模5计数器的设计 mod10Kcnt：时钟分频器的设计 morsea：任意波生成器的设计 sw2reg：加载开关量到寄存器的设计 shift_reg8：移位数据到移位寄存器的设计 scroll：滚动7段数码显示设计 fib：Fibonacci序列设计 pwm4：PWM控制直流电机设计 pwmg：PWM控制伺服电机位置设计-D_flipflop: 1-bit D flip-flop design D_fllipflop_behav: 4-bit D flip-flop design reg1bit: 1-bit register design reg4bit: 4-bit register design shiftreg4: general shift register design ring_shiftreg4: ring shift register design debounce4: elimination shake circuit design clock_pulse: clock pulse circuit design count3bit_gate: 3-bit counter design count3bit_behav: 3-bit counter design mod5cnt: Mode 5 counter design mod10Kcnt: clock divider design morsea: arbitrary waveform generator design sw2reg: Load switch to register the design shift_reg8: shift data into the shift register design scroll: Scroll 7-segment digital display design fib: Fibonacci Sequence Design pwm4: PWM controlled DC motor design pwmg: PWM servo motor position control design
Platform: | Size: 9017344 | Author: 贾诩 | Hits:

[DSP program] DCsources_

Description: PWM generator written in VHDL, simulation is passed, the basic waveform perfect, can be used for DC motor control
Platform: | Size: 24576 | Author: hieu | Hits:

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[VHDL-FPGA-Verilog] PWMVHDL

[VHDL-FPGA-Verilog] FPGAdezizhixingSPWMboChengXu

[VHDL-FPGA-Verilog] moter

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] pwm

[VHDL-FPGA-Verilog] pwm

[VHDL-FPGA-Verilog] EXP5_PWM_GENERATOR

[VHDL-FPGA-Verilog] VHDL-book3

[DSP program] DCsources_

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