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Description: 采用4046实现的10m以下信号的锁相环
电路图。-used to achieve the 4046 10m below the signal phase-locked loop circuit.
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Size: 13312 |
Author: 闪核 |
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Description: 三相光伏逆变之电流环+PI控制仿真simulink仿真-The three-phase PV inverter current loop control simulation simulink simulation+ PI
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Size: 18432 |
Author: 张圣杰 |
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Description: 本原码描述了逆变器逆变控制以及锁相、制动等功能-inverter control and PLL
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Size: 4096 |
Author: Mr.Chen |
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Description: 这是一个Matlab实现的三逆变器的Simulink仿真。电流环反馈，pll环控制相位无偏差。-This is a Matlab implementation of the three inverter Simulink simulation. Current loop feedback, pll loop control phase without bias.
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Size: 8192 |
Author: 张妍 |
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Description: 基于DSP的单相光伏并网逆变器全部源代码，包括锁相环PLL,mppt,pid控制程序,希望对大家有帮助!-DSP single-phase photovoltaic grid-connected inverter with full source code, including the phase-locked loop PLL, mppt, pid control procedures, we hope to help!
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Size: 5120 |
Author: hahalee |
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Description: PHOTOVOLTAIC INVERTER P-PHOTOVOLTAIC INVERTER PLL
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Size: 9216 |
Author: AMINE |
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Description: Algorithm PLL for inverter dc-AC
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Size: 353280 |
Author: WALID |
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Description: 基于lcl滤波器的三相光伏逆变器，已调节好参数，自行设计的pll，完美运行-Lcl filter based on a three-phase photovoltaic inverter, the parameters are adjusted, self-designed pll, perfect run
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Size: 48128 |
Author: 交换空 |
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Description: 该程序是我硕士毕业论文《单相并网逆变器》源程序，调试成功的。（直流直接逆变为交流的单相全桥逆变拓扑，有离网并网功能，锁相环过零检测再采用PI.）-This program is my master' s thesis, " single-phase grid-connected inverters," the source, debugging success. (DC-AC inverter direct single-phase full-bridge inverter topology, there are off-grid and network functions, PLL zero crossing detection and then using PI.)
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Size: 683008 |
Author: 王元浩 |
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Description: 基于锁相环的电网电压定向的矢量控制系统，值得一看-PLL-based directional grid voltage inverter
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Size: 20480 |
Author: 641540446 |
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Description: 三相光伏并网逆变器DSP程序，包括MPPT PLL PID SPWM-3 phase solar inverter DSP，including MPPT PLL PID SPWM
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Size: 4096 |
Author: mzz |
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Description: 在CCS6.0平台上用C语言编写的基于DSP2812的配合改进型H5拓扑结构逆变器的控制程序，控制方式为带锁相环的对称规则法SPWM输出加50Hz频率相位可调方波输出-In the CCS6.0 platform using C language written based on DSP2812 improved type H5 topology inverter control procedures, control mode with phase locked loop (PLL) symmetry rule SPWM output plus frequency 50Hz phase can be adjustable square wave output
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Size: 179200 |
Author: 徐泽政 |
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Description: The circuit models a standard shunt AHF with IGBT inverter and series inductor on the AC side and DC capacitor energization. The load consists of two diode rectifiers which are phase-shifted by 30 degrees. The Delta-Y connected rectifier is connected after 10 cycles to change the load 6-pulse to 12-pulse.
The AHF uses a PLL to generate a reference sinusoidal source current which is in-phase and has the same RMS gain as the load current. The current error between the load current and the reference current is generated by the IGBT Bridge through hysteresis switching. The AHF aims to inject this current error at the point of common coupling in order to match the source current as closely as possible with the reference current.-The circuit models a standard shunt AHF with IGBT inverter and series inductor on the AC side and DC capacitor energization. The load consists of two diode rectifiers which are phase-shifted by 30 degrees. The Delta-Y connected rectifier is connected after 10 cycles to change the load 6-pulse to 12-pulse.
The AHF uses a PLL to generate a reference sinusoidal source current which is in-phase and has the same RMS gain as the load current. The current error between the load current and the reference current is generated by the IGBT Bridge through hysteresis switching. The AHF aims to inject this current error at the point of common coupling in order to match the source current as closely as possible with the reference current.
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Size: 20480 |
Author: shaker |
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Description: 光伏逆变锁相环，使用DSP28335，实现频率跟踪，首先采样，然后PI，然后输出(Photovoltaic inverter PLL, using DSP28335, to achieve frequency tracking, first sampling, then PI, and then output)
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Size: 882688 |
Author: 豆豆1233321 |
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Description: 讲述并网逆变器中全软件锁相环的设计与实现，，即检测基波正序分量的电网电压不平衡和扭曲的条件下。明确地,提出了一种积极的基于一种新的序列检测器双同步坐标系的解耦锁相环（双dq–PLL），完全消除了检测误差传统的同步参考框架（SRF–锁相环PLL）(and implementation of all software phase-locked loop in grid connected inverter is described, that is, detecting the positive and negative component of the fundamental wave under unbalanced grid voltage conditions. Explicitly, a positive decoupling phase locked loop (double DQ - PLL) based on a new sequence detector dual synchronous coordinate system (double DQ - PLL) is proposed, which completely eliminates the traditional synchronous reference frame (SRF - PLL PLL) for detection error.)
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Size: 4512768 |
Author: 醚 |
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