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[Other resourceMyClockTest

Description: 这是我电子线路测试的作业,在FPGA板上实现数字钟,(Max2环境)采用VHDL语言编写,非常适合初学者。具备24小时计时,校时,低高音整点报时,定时和多重功能选择的功能。-This is my test of electronic circuits operating at the FPGA board digital clock (Max2 Environment) using VHDL language, very suitable for beginners. 24-hour time, the school, the whole point of low Treble timekeeping, the timing and choice of multiple functional function.
Platform: | Size: 507269 | Author: blacksun | Hits:

[Other resourcemax2

Description: 最大子矩阵和问题 对于给定的m 行n 列的整数矩阵,编程计算其最大子矩阵和。-matrix and the biggest problem for a given m trip out of the integer n matrix calculation of its programming matrix and the greatest son.
Platform: | Size: 1091 | Author: lxq | Hits:

[Software EngineeringEPM570

Description: Max2-240/570data sheet
Platform: | Size: 106166 | Author: chenzhaoying | Hits:

[Other resourceMAX_II_board_schematics

Description: altera公司max2系列开发板原理图,希望大家喜欢。
Platform: | Size: 241923 | Author: cody | Hits:

[Com Portxinpian_max232

Description: 串口芯片资料详细介绍!!!!!!!中文翻译!-detailed information! ! ! ! ! ! ! Chinese translation!
Platform: | Size: 3118080 | Author: QQQQQQ | Hits:

[VHDL-FPGA-VerilogMyClockTest

Description: 这是我电子线路测试的作业,在FPGA板上实现数字钟,(Max2环境)采用VHDL语言编写,非常适合初学者。具备24小时计时,校时,低高音整点报时,定时和多重功能选择的功能。-This is my test of electronic circuits operating at the FPGA board digital clock (Max2 Environment) using VHDL language, very suitable for beginners. 24-hour time, the school, the whole point of low Treble timekeeping, the timing and choice of multiple functional function.
Platform: | Size: 506880 | Author: blacksun | Hits:

[source in ebookmax2

Description: 最大子矩阵和问题 对于给定的m 行n 列的整数矩阵,编程计算其最大子矩阵和。-matrix and the biggest problem for a given m trip out of the integer n matrix calculation of its programming matrix and the greatest son.
Platform: | Size: 1024 | Author: lxq | Hits:

[SCMmax261

Description: 单片机控制max261/max260/max262的C语言程序,keil调试,有2个警告,欢迎下载。max262和max260/max261的写入方式不同。max260和max261/max262器件引脚不同-SCM max261/max260/max262 the C language program, keil debugger, have two warnings, welcome to download. max262 and max260/max261 write in different ways. max260 pin devices and different max261/max262
Platform: | Size: 31744 | Author: 徐钧 | Hits:

[Software EngineeringEPM570

Description: Max2-240/570data sheet
Platform: | Size: 105472 | Author: chenzhaoying | Hits:

[VHDL-FPGA-VerilogMAX_II_board_schematics

Description:
Platform: | Size: 241664 | Author: cody | Hits:

[Communication-MobileMAX274

Description: 基于MAX274的有源带通滤波器设计。有需要的朋友请下载-MAX274-based active bandpass filter design. Friend in need, please download
Platform: | Size: 8192 | Author: 仙儿 | Hits:

[SCMMAX260

Description: 在网上找的,所以的关于MAX260,MAX261,MAX262,MAX263的中文资料及很多实例程序和经典电路-Online to find, therefore, on the MAX260, MAX261, MAX262, MAX263 Chinese information and a lot of examples of procedures and the classical circuit
Platform: | Size: 7608320 | Author: 仙儿 | Hits:

[VHDL-FPGA-VerilogSerial

Description: 基于MAX2运用Quartus实现串口通信-MAX2-based use of Quartus Serial Communication
Platform: | Size: 572416 | Author: 翡翡 | Hits:

[OpenGL programmax2

Description: D/A,max508的調試,可改成鋸齒波輸出或直流輸出,在MOV A,#?語句更改即可-D/A, max508 debugging can be replaced by sawtooth output or DC output, the MOV A,#? Statement can change
Platform: | Size: 1024 | Author: chan ching | Hits:

[Windows DevelopAVRUSART

Description:
Platform: | Size: 152576 | Author: xia | Hits:

[VHDL-FPGA-VerilogSPI_IIC_design_example

Description: ALTERA原厂提供的例程,网上很难找到的,在MAX2系列芯片上实现过,VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
Platform: | Size: 394240 | Author: 郑康山 | Hits:

[midi programCMIdianlu

Description: 里面包含两个CMI编码电路,用MAX2软件实现-se
Platform: | Size: 32768 | Author: 菲菲 | Hits:

[Embeded-SCM Developmax261

Description: 包含max261的手册,应用实例,以及程序-The manual contains max261, applications, and procedures
Platform: | Size: 1097728 | Author: liupeishandong | Hits:

[VHDL-FPGA-Verilogmax2_test

Description: MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.
Platform: | Size: 1024 | Author: yu | Hits:

[VHDL-FPGA-Verilogan501_design_example

Description: 在MAX2系列CPLD上实现脉冲宽度调制(PWM),完整的设计成程序和仿真结果。-In the MAX2 series CPLD to realize pulse width modulation (PWM), a complete design and simulation results into the program.
Platform: | Size: 259072 | Author: 王志慧 | Hits:
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