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Description: 一个很不错RS编码，用于DVB的信道编码，用VHDL语言编写，在FPGA上通过验证。-A very good RS encoder for DVB Channel Coding using VHDL language, in the FPGA-validated.
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Size: 3072 |
Author: 杨宇 |
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Description: DVB_T系统中信道编码的研究与FPGA实现，一篇很好的说是论文，caj阅读器浏览- Research and FPGA Implementation
of Channel Coding in DVB-T Systems
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Size: 1945600 |
Author: bai |
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Description: 介绍DVB-T的发射通道设计，使用FPGA来实现COFDM调制。-DVBT TRANSMITER SYSTEM IMPLEMENTED ON FPGA
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Size: 135168 |
Author: 老刘 |
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Description: DVB_H信道编码调制的设计及其FPGA实现研究，供大家学习参考。-DVB_H channel coding modulation design and FPGA Realization for them to learn information.
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Size: 2475008 |
Author: 颜琳 |
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Description: 针对DVB-T标准ETSI EN 300 744 V1.5.1,设计了可用于DVB-T接收整机的多速率DDC模块,并在FPGA中仿真实现.在复用数字振荡混频模块的基础上,根据输入信号的不同带宽(6M/8MHz)选择不同的抽取滤波器组完成抽取因子为3或4的多速率处理任务,利用两级半带滤波器(HBF)级联完成4倍抽取滤波,单级奈奎斯特滤波器完成3倍抽取滤波.-For the DVB-T standard ETSI EN 300 744 V1.5.1, designed for DVB-T receiver machine multi-rate DDC module, and the simulation in the FPGA implementation. Numerical oscillation in the complex mixer module, based on the input signals of different bandwidths (6M/8MHz) choose a different group of complete decimation filter extracted factor 3 or 4 of the multi-rate processing tasks, using two half-band filter (HBF) cascade to complete four times decimation filter, single-stage Chennai Nyquist filter to complete three times the decimation filtering.
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Size: 309248 |
Author: 王楚宏 |
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Description: DVB系统中交织器和解交织器设计的FPGA实现-DVB system, the reconciliation Interleaver Interleaver design FPGA implementation
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Size: 708608 |
Author: 程钢 |
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Description:
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Size: 4829184 |
Author: 梅国强 |
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Description: DVB-T系统中的OFDM设计及其FPGA实现，很好很只得看-DVB-T OFDM system design and FPGA implementation, it had to look good
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Size: 4950016 |
Author: 林健 |
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