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[OtherNIOSII那些事儿REV4.0

Description: 详细介绍FPGA的开发流程,不可多得的好书。
Platform: | Size: 5841557 | Author: cole333 | Hits:

[SourceCodeNIOSII跑马灯串口程序

Description:
Platform: | Size: 3495097 | Author: tanhuiling1987@163.com | Hits:

[DocumentsBeMicro SDK lab资料

Description: BeMicro_SDK lab文档,用与学习NIOSii 和Altera FPGA开发
Platform: | Size: 4507431 | Author: fath2011 | Hits:

[ARM-PowerPC-ColdFire-MIPSpara_serial

Description: FPGA内NIOSII核的并口,串口的初始化及其开发-NIOSII nuclear FPGA within the parallel port, serial port initialization and Development
Platform: | Size: 2048 | Author: liu | Hits:

[VHDL-FPGA-VerilogVGA_control_verilogHDL

Description: 基于FPGA的VGA控制器设计。对外支持普通VGA接口,以600×480的分辨率和60Hz扫描率为例。对内支持NIOSII软核接口。-FPGA-based VGA controller design. External support ordinary VGA interface, to 600 × 480 resolution and scan rate of 60Hz as an example. Internal support NIOSII soft-core interface.
Platform: | Size: 288768 | Author: Ray ZH | Hits:

[VHDL-FPGA-Verilogleon3-altera-ep2s60-ddr

Description: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec-This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy--adjust-vma=0x800000 output_file.hexout-O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Platform: | Size: 114688 | Author: | Hits:

[Embeded-SCM DevelopCycloneII_NiosII_2C35_Rev02_DB_P06_10906R_02_FAB.z

Description: CycloneII_NiosII的实验板资料,正在学习FPGA的可以参考一下-Experimental CycloneII_NiosII plate information, are learning FPGA
Platform: | Size: 36268032 | Author: shang | Hits:

[Embeded-SCM DevelopNIosIIStart

Description: NIosII软处理器快速入门,ALTERA FPGA的NIOSII入门指导-Quick Start NIosII soft processor, ALTERA FPGA s NIOSII Getting Started guide
Platform: | Size: 617472 | Author: leedong | Hits:

[VHDL-FPGA-VerilogFPGA

Description: 这些课件可以作为对FPGA有兴趣的人学习的入门资料,包含EDA的概述、FPGA结构与配置、VHDL语言、QuartusII软件、SOPC和NIosII嵌入式处理器设计、DSP Builder系统设计工具等内容-These courseware on the FPGA can be used as those who are interested in learning introductory information, including EDA overview, FPGA structure and configuration, VHDL language, QuartusII software, SOPC and NIosII embedded processor design, DSP Builder tools for system design, etc.
Platform: | Size: 25555968 | Author: wangxujun | Hits:

[OS Developniosii

Description: altera fpga nios2 demo qutarts file
Platform: | Size: 1748992 | Author: sadamu | Hits:

[Software EngineeringLCD-Drive-and-control-based-on-NIOSII

Description: 本文介绍了一种基于NIOS II软核处理器实现对LCD-LQ057Q3DC02控制的新方法。在设计中利用FPGA的Altera的SOPC Builder定制NIOS II软核处理器及其与显示功能相关的“软” 硬件模块来协同实现显示控制的软硬件设计。利用SOPC技术,将NIOS II CPU和LCD控制器放在同一片FPGA中,解决了通常情况下必须使用LCD 控制专用芯片才能解决LCD显示的问题。-This article describes an approach based on NIOS II soft-core processors to achieve control of the LCD-LQ057Q3DC02 new method. The use of FPGA in the design of Altera' s SOPC Builder Custom NIOS II soft-core processor and its display-related " soft" hardware modules to achieve synergistic display control hardware and software design. Using SOPC technology, NIOS II CPU and LCD controller on the same FPGA, the solution to the normally must use the LCD control ASIC in order to solve the problem of LCD display.
Platform: | Size: 67584 | Author: shiquan | Hits:

[VHDL-FPGA-VerilogNIOSII-Step-by-step

Description: FPGA中有关niosii的,对初学者很有用的文档。-Niosii relating to the FPGA, and the document is useful for beginners.
Platform: | Size: 1638400 | Author: hao | Hits:

[Embeded-SCM DevelopNIOS_DMA_test

Description: NiosII范例,都是比较经典复杂的例程,很不错的-FPGA NIOSII SOPC
Platform: | Size: 17206272 | Author: yjh | Hits:

[VHDL-FPGA-VerilogNiosII

Description: 一个NIOS II初学者非常好的资料,提供了大量的实例。-FPGA NIOSII
Platform: | Size: 2936832 | Author: roal | Hits:

[Embeded-SCM Develop8

Description: NiosII讲义,FPGA内部培训核心讲义,对开发FPGA的高级人员和初级人员都非常有用-FPGA design
Platform: | Size: 573440 | Author: 黄宇 | Hits:

[Communication-MobileNiosII-LED-Demo

Description: 这是 Quartues II 的 FPGA SOPC NIOS_II IDE的设历程,对于初学者肯定有很大的帮助-This is a Quartues II of the FPGA SOPC NIOS_II IDE to set the course for beginners will definitely be very helpful
Platform: | Size: 317440 | Author: hanbin | Hits:

[VHDL-FPGA-Veriloglcd

Description: FPGA嵌入式开发中的NIOSii的LCD1602控制程序。-FPGA NIOSii LCD1602
Platform: | Size: 1024 | Author: | Hits:

[File FormatNIOSII

Description: NIOS II 教程 本套教程是FPGA黑金开发板配套教程,通过图文并茂的形式展现给读着,内容详细充实,由浅入深,逐步探索NIOS II技术,特别适合NIOS II的初学者阅读。-NIOS II
Platform: | Size: 3305472 | Author: 风雪 | Hits:

[VHDL-FPGA-VerilogNiosII

Description: FPGA NiosII 相关例程,Flash方面的和实验的几个例程,学习FPGA NIOSII 感兴趣的赶紧下载吧,编译通过,直接能用。-FPGA NiosII related routines, Flash and experimental aspects of several routines, learning FPGA NIOSII interested in quickly download it, compile, can be used directly.
Platform: | Size: 13899776 | Author: xhl | Hits:

[VHDL-FPGA-VerilogNIOSII-MP3

Description: NIOSII,关于MP3的源代码,用SOPC+NIOSII平台开发的,可以运行,代码详细.大家放心使用.-FPGA NIOSII MP3
Platform: | Size: 1591296 | Author: gyj | Hits:
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