Search - FPGA ALU

[VHDL-FPGA-Verilog] VHDL的基本数学运算库

Description: VHDL的基本数学运算库,非常好用-VHDL basic arithmetic library, a very handy! !
Platform: | Size: 232448 | Author: | Hits:

[VHDL-FPGA-Verilog] verilog实例

Description: 一些很实用的verilog源程序，是初学者的好棒手，希望能给需要的人一点帮助，请支持一下。-some very practical Verilog source is the beginners excellent hands, in hopes of giving those who need a bit of help, please support what.
Platform: | Size: 165888 | Author: 叶若寒 | Hits:

[Other] LED

Description: 用VHDL 语言描述度7段LED数码显示管，其开发均在FPGA中-using VHDL description of 7 degrees LED digital display tubes, which were developed in FPGA
Platform: | Size: 122880 | Author: 侯同 | Hits:

[USB develop] USB

Description: 这个工程是基于FPGA与Philips的D12 USbB 1.1的完整设计，包括VHDL驱动和主机应用程序及驱动-The project is based on FPGA and Philips of the D12 USbB 1.1 complete design, including VHDL-driven and mainframe applications and drivers
Platform: | Size: 2749440 | Author: Phirix Shaw | Hits:

[VHDL-FPGA-Verilog] alu3

Description: 用verilog语言编写，一个8-bit ALU，可以完成按字节的+、-和与、或、非操作-Using Verilog language, an 8-bit ALU, to be completed by byte+,- And, or, non-operating
Platform: | Size: 203776 | Author: 徐芬 | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 使用verilog作为CPU设计语言实现单数据通路五级流水线的CPU。具有32个通用寄存器、一个程序计数器PC、一个标志寄存器FLAG，一个堆栈寄存器STACK。存储器寻址粒度为字节。数据存储以32位字对准。采用32位定长指令格式，采用Load/Store结构，ALU指令采用三地址格式。支持有符号和无符号整数加、减、乘、除运算，并支持浮点数加、减、乘、除四种运算，支持与、或、异或、非4种逻辑运算，支持逻辑左移、逻辑右移、算术右移、循环右移4种移位运算，支持Load/Store操作，支持地址/立即数加载操作，支持无条件转移和为0转移、非0转移、无符号>转移、无符号<转移、有符号>转移、有符号<转移等条件转移。
Platform: | Size: 43008 | Author: haotianr | Hits:

[SCM] VHDLdanpianji

Description: 本文首先对MCS8051单片机的原理进行介绍和分析；接着介绍使用EDA技术，用VHDL语言完成了8051单片机的设计工作；MCS8051单片机的CPU和数模转换器的设计运用了算术逻辑单元ALU算术运算的算法实现和控制单元的状态机；以及数模转换器的∑-△调制方法的实现。通过如上的算法实现，可以看出VHDL语言在算法级的设计上具有很多的优势和特点。使用EDA技术设计的结果既可以用FPGA／CPLD来实施验证，也可以直接做成专用集成电路(ASIC)。-VHDL
Platform: | Size: 254976 | Author: li | Hits:

[VHDL-FPGA-Verilog] alu

Description: 加法器FPGA 实现，精简，快速，高效，有仿真文件-adder base on FPGA ，verilog HDL
Platform: | Size: 1024 | Author: lijiaming | Hits:

[VHDL-FPGA-Verilog] yetert

Description: This package includes 4-bit calculator designed in Xilinx FPGA 10 using VHDL. This calculator contains 3 registers, 1 ALU, 1 decoder and 1 FSM (finite state machine).
Platform: | Size: 458752 | Author: crion | Hits:

[VHDL-FPGA-Verilog] spartan_alu_8_bit

Description: Verilog based 8 bit ALU module, implemented on Spartan 3E FPGA.
Platform: | Size: 9216 | Author: ifusmell | Hits:

[VHDL-FPGA-Verilog] alu_struct

Description: ALU written in VHDL, tested in FPGA advantage, there will be no support on this code. All right reserved by developer.
Platform: | Size: 1024 | Author: nadir | Hits:

[VHDL-FPGA-Verilog] ALU

Description: ALU与ALU控制器设计，verlog语言书写-ALU
Platform: | Size: 400384 | Author: 刘君 | Hits:

[VHDL-FPGA-Verilog] Alu-with-seven-segmetn-output

Description: This contains VHDL source code for a simple arithmetic logic unit. the input and results are displayed on a 4 digit 7 segment display. The user controls the input throug the use of switches. This design was created for the nexys 2 fpga but can be easily ported to other fpga s.
Platform: | Size: 8192 | Author: hatsjoe | Hits:

[Other] alu

Description: cpu中的一个部件——运算器。实现八种运算，是FPGA编程-In a CPU parts-- operator. The realization of eight kinds of operations, is the FPGA programming
Platform: | Size: 2048 | Author: 回音男孩 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 基于FPGA实现的简单ALU。ALU中主要包含有符号的加法、减法、乘法、左移、右移。ALU的顶层要控制运算和复位。-FPGA-based implementation of a simple ALU. ALU mainly contains symbols of addition, subtraction, multiplication, left, right. To control the operation of the ALU and reset the top.
Platform: | Size: 696320 | Author: 非南 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 简单在fpga上实现的alu部分功能，初学数字信号处理者使用-Simple on fpga alu implemented some functions, beginner to use digital signal processing
Platform: | Size: 1096704 | Author: 胡文昱 | Hits:

[Software Engineering] ALU

Description: designing ALU using FPGA
Platform: | Size: 480256 | Author: dodo | Hits:

[VHDL-FPGA-Verilog] 各种基础module打包下载全集

Description: 例如分频器，alu，ram的verilog实现(The implementation of divider, alu, ram etc. in verilog)
Platform: | Size: 7168 | Author: Harrypotterrrr | Hits:

[Other] MyALU1

Description: 一个关于寄存器的ALU功能，并能进行寄存器间的相互转化。(ALU REGISTER. THEY CAN TRANSLATE TO EACH OTHER.)
Platform: | Size: 397312 | Author: lueluelue | Hits:

[VHDL-FPGA-Verilog] alu

Description: A simple ALU on Altera FPGA for learners
Platform: | Size: 367616 | Author: godup | Hits:

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[VHDL-FPGA-Verilog] VHDL的基本数学运算库

[VHDL-FPGA-Verilog] verilog实例

[Other] LED

[USB develop] USB

[VHDL-FPGA-Verilog] alu3

[VHDL-FPGA-Verilog] CPU

[SCM] VHDLdanpianji

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] yetert

[VHDL-FPGA-Verilog] spartan_alu_8_bit

[VHDL-FPGA-Verilog] alu_struct

[VHDL-FPGA-Verilog] ALU

[VHDL-FPGA-Verilog] Alu-with-seven-segmetn-output

[Other] alu

[VHDL-FPGA-Verilog] ALU

[VHDL-FPGA-Verilog] ALU

[Software Engineering] ALU

[VHDL-FPGA-Verilog] 各种基础module打包下载全集

[Other] MyALU1

[VHDL-FPGA-Verilog] alu

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