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[VHDL-FPGA-VerilogCIC_deci4

Description: cic抽取滤波器ip核,用于射频采样数字下变频模块的核心数字信号处理部分.此ip核已经过ise10.2验证-CIC decimation by 4 filter,used in Direct RF sampling of GPS signal. the core dsp block in a frondend design
Platform: | Size: 31744 | Author: mimidabuda | Hits:

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