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Description: SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating with a 100MHz Bus Clock. The rating is based on Dhrystone 2.1. It shows the rate when I+D Caches are disabled or enabled, with or without MMU and I Cache is disable or enabled, with or without MMU. -SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating w praxiology a 100MHz Bus Clock. The rating is based on Dhr ystone 2.1. It shows the rate when I Caches are d D. isabled or enabled, with or without MMU and I Cache is disable or enab led, with or without MMU.
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Size: 424960 |
Author: 啊非 |
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