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[Crack Hack] aes_thesis_v1.0

Description: AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
Platform: | Size: 386048 | Author: 蕭嵎之 | Hits:

[Crack Hack] AES_verilog

Description: AES 128bit数据,128bit密钥加解密的verilog语言实现-AES 128bit data, 128bit key encryption and decryption of the verilog language implementation
Platform: | Size: 79872 | Author: 刘蕊丽 | Hits:

[VHDL-FPGA-Verilog] aes

Description: verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
Platform: | Size: 7168 | Author: xie | Hits:

[Other Embeded program] FFT-C

Description: C语言实现FFT算法，思维清晰，技巧行较强。-AES encryption algorithm (128) bit Verilog implementation, modular design, easy to understand.
Platform: | Size: 7168 | Author: mr hu | Hits:

[VHDL-FPGA-Verilog] AES_verilog

Description: 对AES算法加密解密的Verilog源代码，可以实现其128位和256位明文密文之间的转换。-AES algorithm for encryption and decryption of Verilog source code, can achieve the conversion of its 128 and 256 between the plaintext ciphertext.
Platform: | Size: 19456 | Author: 毛子明 | Hits:

[Crack Hack] aes

Description: 使用verilog的128位aes加密源程序-Use verilog of 128 aes encryption source code
Platform: | Size: 9216 | Author: boren | Hits:

[Crack Hack] AES-GF(2^4)^2 for sbox

Description: AES加解密程序，128bit数据位宽，其中sbox和混合列运算在复合域GF(2^4)^2上完成(An AES encryption and decryption program with 128 bits datawidth, which used GF(2^4)^2 for sbox and mixcolumn.)
Platform: | Size: 17408 | Author: 酱瓶 | Hits:

[VHDL-FPGA-Verilog] aes128-hdl-master

Description: Verilog AES hdl key 128 bit code and decode
Platform: | Size: 856064 | Author: Nguyen Nam | Hits:

[VHDL-FPGA-Verilog] aes_128pprm3

Description: 基于PPRM3S盒的128位AES密码算法Verilog代码(Verilog code for 128 bit AES cipher based on PPRM3S box)
Platform: | Size: 15360 | Author: 青龙山梁朝伟 | Hits:

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